User-Defined I/O Resources; Device-Embedded Logic And Processing; Reconfigurable I/O Architecture - National Instruments NI PXI-7831R User Manual

Reconfigurable i/o

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Chapter 1

Introduction

NI PXI-7831R User Manual

User-Defined I/O Resources

With the RIO device, you can define both the combination of I/O resources

and the I/O resources themselves. You can also create new building blocks

on top of fixed I/O resources. For example, one application might require

an event counter that increments when a rising edge appears on any of three

digital input lines. Another application might require a digital line to be

asserted once an analog input exceeds a programmable threshold. You can

implement these user-defined behaviors in the hardware for fast,

deterministic performance.

You can embed logic and processing in the FPGA of the RIO device.

Typical logic functions include Boolean operations, comparisons, and

basic mathematical operations. You can implement multiple functions

efficiently in the same design, operating sequentially or in parallel. It is

possible to implement more complex algorithms such as control loops,

but the size of the FPGA limits the scope of these algorithms.

Figure 1-1, which illustrates a generic representation of RIO device, shows

an FPGA connected to fixed I/O resources and a bus interface.

Bus Interface

Figure 1-1. High-Level FPGA Functional Overview

The fixed I/O resources include A/D converters (ADCs), D/A converters

(DACs), digital input or output lines, or other I/O resources. Software

accesses the RIO device through the bus interface, and the FPGA provides

FPGA

1-6

Fixed I/O Resource

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