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Si5317 E
VALUATION
Description
The Si5317-EVB User's Guide provides a complete and
simple evaluation of the functions, features, and
performance of the Si5317.
The Si5317 is a pin-controlled 1:1 jitter-attenuating
clock for high-performance applications.
The Si5317 is based on Silicon Laboratories' 3rd-
generation DSPLL® technology, which provides any-
rate jitter attenuation in a highly integrated PLL solution
that eliminates the need for external VCXO and loop
filter components. The DSPLL loop bandwidth is user
programmable, providing jitter performance optimization
at the application level.
Rev. 0.1 5/10
B
U
OARD
Features
Copyright © 2010 by Silicon Laboratories
Si 5 3 1 7 - EVB
'
G
SER
S
U I D E
No software required. Simple jumpers for device
configuration
Fully powered from either a single USB port or an
external power supply
Selectable external reference clock or on-board
crystal
Status LEDs
Header to connect to external test equipment for
automated testing
Si5317-EVB

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Summary of Contents for Silicon Laboratories Si5317-EVB

  • Page 1 Si5317 E ’ VALUATION OARD U I D E Description Features The Si5317-EVB User’s Guide provides a complete and  No software required. Simple jumpers for device simple evaluation of the functions, features, and configuration performance of the Si5317. ...
  • Page 2: Functional Block Diagram

    1 to 710 MHz. The clock frequency range and loop bandwidth are selectable from a simple look-up table. The Si5317-EVB has a differential clock input that is AC terminated to 50  and then AC-coupled to the Si5317. The two clock outputs are AC-coupled. The XA-XB reference is usually a 114.285 MHz crystal; but there are provisions for an external XA-XB reference (either differential or single-ended).
  • Page 3 XA-XB pins. To that end, the EVB is configured with a 114.285 MHz third overtone crystal connected between pins 6 and 7 of the Si5317. However, the Si5317-EVB is also capable of using an external XA- XB reference oscillator, either differential or single-ended. For details concerning the allowed XA-XB reference frequencies and their RATE settings, see the Si5317 data sheet.
  • Page 4 Si5317-EVB 2.3. Output Clock The clock outputs are AC-coupled and are available on SMAs J5, J7, J9 and J11. For LVCMOS outputs, it might be desirable to replace the AC coupling capacitors (C9,C14,C17, and C20) with 0  resistors. Also, if greater drive strength is desired for an LVCMOS output, R6 and R10 can be installed.
  • Page 5: Connectors And Leds

    Si5317-EVB 3. Connectors and LEDs 3.1. LEDs Table 2. LED Descriptions Label Significance CS_CA Not used LOS2 Not used LOS1 ON = no valid clock input ON = Si5317 is not locked DUT_PWR ON = Si5317 power is present 3.3V ON = 3.3 V power is present...
  • Page 6 Si5317-EVB Table 3. Configuration Header, J12 J12.1 not used J12.2 SFOUT0 J12.3 SFOUT1 J12.4 FRQSEL0 J12.5 FRQSEL1 J12.6 FRQSEL2 J12.7 FRQSEL3 J12.8 FRQTBL J12.9 BWSEL0 J12.10 BSWEL1 J12.11 DBL2_BY J12.12 not used J12.13 RATE0 J12.14 RATE1 Table 4. Status Indication Header, J13 Signal J13.1...
  • Page 7 Si5317-EVB 4. Schematic Rev. 0.1...
  • Page 8 Si5317-EVB Rev. 0.1...
  • Page 9: Bill Of Materials

    Si5317-EVB 5. Bill of Materials Item Reference Part MfrPartNum Digikey Footprint C1,C2,C3, 10NF Venkel C0603X7R160- C13,C15, 103KNE C4,C7,C9, 100N Venkel C0603X7R160- C10,C11, 104KNE C12,C14, C16,C17, C18,C20 C5,C22,C25 Venkel C0603X7R6R3- 105KNE C21,C24 220UF Kemet T494B227M004A 399-4631- SM_C_3528_21 1-ND C23,C26 33UF Venkel...
  • Page 10 Si5317-EVB Item Reference Part MfrPartNum Digikey Footprint R2,R8,R13, 0 ohm Venkel CR0603-16W- 000T R3,R4,R5, 49.9 Venkel CR0603-16W- R7,R9,R11 49R9FT Venkel CR0603-16W- 10R0FT R15,R20 Venkel CR603-16W- 1002FT R17,R18 Venkel CR0603-16W- 1500FT R150x4 Panasonic EXB-38V151JV Y9151CT- 1206x4 Si5317 Silicon Si5317A-C-GM QFN-36 Labs...
  • Page 11 Si5317-EVB 6. Layout Figure 5. Silkscreen Top Rev. 0.1...
  • Page 12 Si5317-EVB Figure 6. Layer 1 Rev. 0.1...
  • Page 13 Si5317-EVB Figure 7. Layer 2—Ground Plane Rev. 0.1...
  • Page 14 Si5317-EVB Figure 8. Layer 3 Rev. 0.1...
  • Page 15 Si5317-EVB Figure 9. Layer 4 Rev. 0.1...
  • Page 16 Si5317-EVB Figure 10. Layer 5, FILT_DUT_PWR Rev. 0.1...
  • Page 17 Si5317-EVB Figure 11. Layer 6, Bottom Rev. 0.1...
  • Page 18 Si5317-EVB Figure 12. Bottom Silkscreen Rev. 0.1...
  • Page 19: Factory Default Configuration

    Si5317-EVB 7. Factory Default Configuration Jumper J12.1 not used — J12.2 SFOUT0 J12.3 SFOUT1 J12.4 FRQSEL0 J12.5 FRQSEL1 J12.6 FRQSEL2 J12.7 FRQSEL3 J12.8 FRQTBL J12.9 BWSEL0 J12.10 BSWEL1 J12.11 DBL2_BY J12.12 not used — J12.13 RATE0 J12.14 RATE1 The above jumper settings result in the following: ...
  • Page 20 The products must not be used within any Life Support System without the specific written consent of Silicon Laboratories. A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death.