Advanced Chipset Features; Dram Clock - VIA Technologies IB781 User Manual

BIOS SETUP

Advanced Chipset Features

This Setup menu controls the configuration of the chipset.
DRAM Clock / Drive Control
AGP & P2P Bridge Control
CPU & PCI Bus Control
Power-Supply Type
VGA Share Memory Size
Select Display Device
Panel Type
Current FSB Frequency
Current DRAM Frequency

DRAM Clock

DRAM Timing
DRAM CAS Latency
Bank Interleave
Precharge to Active(Trp)
Active to Precharge(Tras)
Active to CMD(Trcd)
DRAM Command Rate
AGP Aperture Size
AGP Driving Control
AGP Driving Value
AGP Fast Write
AGP Master 1 WS Write
AGP Master 1 WS Read
CPU to PCI Write Buffer
PCI Master 0 WS Write
PCI Delay Transaction
DRAM Clock / Drive Control
This field provides settings related to DRAM. The fields and their
respective default settings include DRAM Clock (By SPD), DRAM
Timing (By SPD), DRAM CAS Latency (2.5), Bank Interleave
(Disabled), Precharge to Active (3T), Active to Precharge (6T), Active
to CMD (3T) and DRAM Command Rate.
Current FSB Frequency
The default setting of the FSB Frequency is 100MHz.
Current DRAM Frequency
The default setting of the DRAM Frequency is 133MHz.
DRAM Clock
The default setting of the DRAM clock is SPD.
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Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
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ATX
32M
CRT+LCD
1024x 768.1Ch.18bit
Phoenix - AwardBIOS CMOS Setup Utility
DRAM Clock/Driver Control
100MHz
133MHz
By SPD
By SPD
2.5
Disabled
3T
6T
3T
2T Command
Phoenix - AwardBIOS CMOS Setup Utility
AGP & P2P Bridge Control
64M
Auto
DA
Disabled
Disabled
Disabled
Phoenix - AwardBIOS CMOS Setup Utility
CPU & PCI Bus Control
Enabled
Disabeld
Disabled
IB781 User' s Manual
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