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DRX-2
The Video-I/O-switching is basically realized by the matrix
switch STV6618 [7408], which is controlled via I 2 C-bus
by the CC. All used outputs excluding pin 21 (Y/CVBS-
REC) have a 6dB-amplification and a 75 Ohms-driver-
stage inside. This IC also includes several digital outputs,
which are used for switching purposes on the analog
board. The record selector inside the switch selects
between the CVBS from frontend, the CVBS from Cinch-
Rear or Y from the S-Video-input rear.
Afterwards the signal passes another switch [7411] in
which a selection between signals from the front or the
preselected ones is done. The output signals of [7411] are
fed as "A_YCVBS"- and "A_C"-line to the digital board for
further processing.
To reduce the number of external presets there is only one
station for CVBS or Y/C (front and rear). The set
automatically detects between the two inputs depending
on the presence of a video signal (sync separator-circuit
on P-sub-board) where Y/C has higher priority.
The Y/U/V-inputs are routed over the optional EPG board
to the digital PCB. Only the Y-line has to be present
additionally on pin 4 of [7408] for video recognition. Also
all other video signal from the analog board are routed
through the EPG board if present.
The signals "D_C" and "D_Y" are fed through [7408] (6dB
amplification) and via [7406], [7409] used as driver to the
S-Video output connector. The "D_CVBS" line is directly
routed to the modulator and via the circuit around [7431]
and [7432] amplified by 6dB before it is fed to the CVBS
output plug. In case of EPG the signals from the digital
board are routet through the EPG board where the
selection between digital board video or EPG OSD is
taken.
The Y/U/V signals from the digital board are also passing
[7408] for 6dB amplification and driving purpose.
To achieve optimal picture quality the set is equipped with
a simple progressive scan function based on a so-called
line doubler. The complete generation of the signal is done
on the digital board and via a separate cable and
connector [1946] the corresponding Y/U/V lines are routed
to the analog PCB. Also the YUVprogressive signals are
switchable to EPG OSD on the EPG board if implemented.
As there is only one Y/U/V output available a switching
between interlaced and progressive output is necessary.
While the transistors [7421], [7422], [7424], [7425], [7427]
and [7428] are used as driver for Y/U/V progressive,
[7423], [7426] and [7429] together with [7405] are
necessary for killing these signals via pin 42 of [7408] in
case the interlaced is selected ("PSCAN_KILL"-line set to
low). If progressive output is active the pins 27, 29 and 31
of [7408] are set to high impedance and "PSCAN_KILL" is
also high (e.g. 5V).
The detection of the picture ratio information on the Y/C
inputs (rear or front) is done by measuring the DC-level on
the Chroma signal via an analog input of the CC-P
("WSRI"- and "WSFI"-line). In case the level is higher than
110
3,5V the input signal is a 16:9 source, if the level is lower
than 2,4V the picture ratio is 4:3.
For generation of the appropriate DC-voltage on the Y/C
output the "WSRO"-line is controlled via pin18 of [7408] by
the CC-P (Pin 18 set to low means 4:3, pin 18 set to high
determines 16:9).
During Stand-By there is also no loop-through of any input
to any output performed.
5. Digital Board Chrysalis 2.1
5.1 Introduction
Block diagram 2nd generation DVD recorder
DISPLAY &
CONTROL BOARD
CONTROL
VIDEO IN/OUT
AUDIO IN/OUT
ANALOG BOARD
2FH VIDEO OUTPUT
CONTROL
POWER SUPPLY
This 2nd generation Digital Board is based on the highly
integrated 'Chrysalis' IC. Its predecessors, the 'Empire'
and 'Empress' based boards, had two PWBs mounted on
top of each other (due to separate DVIO board). For this
new generation, all functionality is now available on one
PWB in one BGA IC (Ball Grid Array) i.s.o. four VLSI ICs.
The board encodes and multiplexes analogue video and
digital uncompressed audio (I2S) into an MPEG2 stream.
This MPEG2 stream is formatted, to be recorded by the
DVD+RW engine. In playback, the board will decode the
MPEG2 stream into analogue and digital audio and into
analogue video. In addition, a DV stream can be received
via IEEE1394 (i-Link), and transformed to MPEG2 format.
There are versions foreseen, to generate a progressive
scan analogue video output. In the standard Chrysalis
board, the progressive video output is generated by the
PNX7100. In the Chrysalis 'F' it is generated by the
Faroudja FLi2301.
The Chrysalis Digital board is pin compatible with the
Empress digital board in terms of A/V IO, BE interface,
Power Supply, and Service interface. For functional
enhancements, several connectors are added:IDE
connector (HDD, AV3, PCMCIA, etc.).
BASIC ENGINE
DIGITAL BOARD
DV IN
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