JVC UX-A10DVD Service Manual page 67

Micro component md system
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3.Pin function
Pin No.
Symbol
1
VDD
2
DQ0
3
VDDQ
4,5
DQ1,DQ2
6
VSSQ
7,8
DQ3,DQ4
9
VDDQ
10,11
DQ5,DQ6
12
VSSQ
13
DQ7
14
VDD
15
LDQM
16
WE
17
CAS
18
RAS
19
CS
20,21
BA0,BA1
22~26
A10/AP,
A0~A3
27,28
VDD,VSS
29~35
A4~A9,
A11
36
N.C
37
CKE
38
CLK
39
UDQM
40
N.C/RFU
41
VSS
42
DQ8
43
VDDQ
44,45
DQ9,DQ10
46
VSSQ
47,48
DQ11,DQ12
49
VDDQ
50,51
DQ13,DQ14
52
VSSQ
53
DQ15
54
VSS
Power and ground for the input buffers and the core logic.
Data inputs/outputs are muitiplexed on the same plns.
Isolated power supply and ground for the output buffers to provide improved noise
Immunity.
Data inputs/outputs are muitiplexed on the same plns.
Isolated power supply and ground for the output buffers to provide improved noise
Immunity.
Data inputs/outputs are muitiplexed on the same plns.
Isolated power supply and ground for the output buffers to provide improved noise
Immunity.
Data inputs/outputs are muitiplexed on the same plns.
Isolated power supply and ground for the output buffers to provide improved noise
Immunity.
Data inputs/outputs are muitiplexed on the same plns.
Power and ground for the input buffers and the core logic.
Makes data output Hi-Z, tsHZ after the clock and masks the output.
Blocks data input when L(U)DQM active.
Enables wnite operation and row precharge.
Latches data in starting from CAS,WE active.
Latches column addresses on the positlve going edge of the CLK with CAS low.
Enables column access.
Latches row addresses on the positlve going edge of the CLK with RAS low.
Enables row access & precharge.
Disables or enables device oparation by masking or enabling all inputs except
CLK,CKE and L(U)DQM
Selects bank to be activated during row address latch time.
Selects bank for read/write during column address latch time.
Row/column addresses are multiplexed on the same plns.
Row address : RA0~RA11, Column address : CA0~CA7
Power and ground for the input buffers and the core logic.
Row/column addresses are multiplexed on the same plns.
Row address : RA0~RA11, Column address : CA0~CA7
This pin is recommended to be left No Connection on the device.
Masks system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one cycle prior to new command.
Dlsable input buffers for power down in standby.
Active on the positlve going edge to sample all inputs.
Makes data output Hi-Z, tsHZ after the clock and masks the output.
Blocks data input when L(U)DQM active.
This pin is recommended to be left No Connection on the device.
Power and ground for the input buffers and the core logic.
Data inputs/outputs are muitiplexed on the same plns.
Isolated power supply and ground for the output buffers to provide improved noise
Immunity.
Data inputs/outputs are muitiplexed on the same plns.
Isolated power supply and ground for the output buffers to provide improved noise
Immunity.
Data inputs/outputs are muitiplexed on the same plns.
Isolated power supply and ground for the output buffers to provide improved noise
Immunity.
Data inputs/outputs are muitiplexed on the same plns.
Isolated power supply and ground for the output buffers to provide improved noise
Immunity.
Data inputs/outputs are muitiplexed on the same plns.
Power and ground for the input buffers and the core logic.
Function
UX-A10DVD
K4S641632F-TC75
1-67

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