External Interface Ready-On-Read Timing With One External Wait State; External Memory Interface Read Switching Characteristics (Ready-On-Read, 1 Wait State); External Memory Interface Read Timing Requirements (Ready-On-Read, 1 Wait State); Synchronous Xready Timing Requirements (Ready-On-Read, 1 Wait State) - Texas Instruments TMS320C2810 Data Manual

TMS320F2810, TMS320F2811, TMS320F2812
TMS320C2810, TMS320C2811, TMS320C2812
SPRS174T – APRIL 2001 – REVISED MAY 2012

6.26 External Interface Ready-on-Read Timing With One External Wait State

Table 6-35. External Memory Interface Read Switching Characteristics (Ready-on-Read, 1 Wait State)
t Delay time, XCLKOUT high to zone chip-select active-low
d(XCOH-XZCSL)
t Delay time, XCLKOUT high/low to zone chip-select inactive-high
d(XCOHL-XZCSH)
t Delay time, XCLKOUT high to address valid
d(XCOH-XA)
t Delay time, XCLKOUT high/low to XRD active-low
d(XCOHL-XRDL)
t Delay time, XCLKOUT high/low to XRD inactive-high
d(XCOHL-XRDH)
t Hold time, address valid after zone chip-select inactive-high
h(XA)XZCSH
t Hold time, address valid after XRD inactive-high
h(XA)XRD
(1) During inactive cycles, the XINTF address bus will always hold the last address put out on the bus. This includes alignment cycles.
Table 6-36. External Memory Interface Read Timing Requirements (Ready-on-Read, 1 Wait State)
t Access time, read data from address valid
a(A)
t Access time, read data valid from XRD active-low
a(XRD)
t Setup time, read data valid before XRD strobe inactive-high
su(XD)XRD
t Hold time, read data valid after XRD inactive-high
h(XD)XRD
(1) LR = Lead period, read access. AR = Active period, read access. See
Table 6-37. Synchronous XREADY Timing Requirements (Ready-on-Read, 1 Wait State)
t Setup time, XREADY (synchronous) low before XCLKOUT high/low
su(XRDYsynchL)XCOHL
t Hold time, XREADY (synchronous) low
h(XRDYsynchL)
Earliest time XREADY (synchronous) can go high before the sampling
t
e(XRDYsynchH)
XCLKOUT edge
t Setup time, XREADY (synchronous) high before XCLKOUT high/low
su(XRDYsynchH)XCOHL
t Hold time, XREADY (synchronous) held high after zone chip-select high
h(XRDYsynchH)XZCSH
(1) The first XREADY (synchronous) sample occurs with respect to E in
E = (XRDLEAD + XRDACTIVE) t
When first sampled, if XREADY (synchronous) is found to be high, then the access will complete. If XREADY (synchronous) is found to
be low, it will be sampled again each t
For each sample (n), the setup time (D) with respect to the beginning of the access can be calculated as:
D = (XRDLEAD + XRDACTIVE + n – 1) t
where n is the sample number (n = 1, 2, 3, and so forth).
Table 6-38. Asynchronous XREADY Timing Requirements (Ready-on-Read, 1 Wait State)
t Setup time, XREADY (asynchronous) low before XCLKOUT high/low
su(XRDYAsynchL)XCOHL
t Hold time, XREADY (asynchronous) low
h(XRDYAsynchL)
Earliest time XREADY (asynchronous) can go high before the sampling
t
e(XRDYAsynchH)
XCLKOUT edge
t Setup time, XREADY (asynchronous) high before XCLKOUT high/low
su(XRDYAsynchH)XCOHL
t Hold time, XREADY (asynchronous) held high after zone chip-select high
h(XRDYAsynchH)XZCSH
(1) The first XREADY (asynchronous) sample occurs with respect to E in
E = (XRDLEAD + XRDACTIVE – 2) t
When first sampled, if XREADY (asynchronous) is found to be high, then the access will complete. If XREADY (asynchronous) is found
to be low, it will be sampled again each t
For each sample, setup time from the beginning of the access can be calculated as:
D = (XRDLEAD + XRDACTIVE – 3 + n) t
where n is the sample number (n = 1, 2, 3, and so forth).
134 Electrical Specifications
Product Folder Link(s):
PARAMETER
c(XTIM)
until it is found to be high.
c(XTIM)
– t
c(XTIM) su(XRDYsynchL)XCOHL
c(XTIM)
until it is found to be high.
c(XTIM)
– t
c(XTIM) su(XRDYAsynchL)XCOHL
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MIN
Table 6-30.
Figure 6-33:
Figure 6-34:
Copyright © 2001–2012, Texas Instruments Incorporated
www.ti.com
MIN MAX UNIT
1 ns
–2 3 ns
2 ns
1 ns
–2 1 ns
(1)
ns
(1)
ns
MAX UNIT
(1)
(LR + AR) – 14 ns
(1)
AR – 12 ns
12 ns
0 ns
(1)
MIN MAX UNIT
15 ns
12 ns
3 ns
15 ns
0 ns
(1)
MIN MAX UNIT
11 ns
8 ns
3 ns
11 ns
0 ns