Functional Overview - Texas Instruments TMS320C2810 Data Manual

TMS320F2810, TMS320F2811, TMS320F2812
TMS320C2810, TMS320C2811, TMS320C2812
SPRS174T – APRIL 2001 – REVISED MAY 2012
3

Functional Overview

TINT0
TINT1
XINT13
XNMI
G
P
I
O
GPIO Pins
M
U
X
16 Channels
XRS
X1/XCLKIN
X2
XF_XPLLDIS
Protected by the code-security module.
A. 45 of the possible 96 interrupts are used on the devices.
B. XINTF is available on the F2812 and C2812 devices only.
C. On C281x devices, the OTP is replaced with a 1K x 16 block of ROM.
26 Functional Overview
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CPU-Timer 0
CPU-Timer 1
CPU-Timer 2
TINT2
PIE
(A)
(96 Interrupts)
External Interrupt
Control
(XINT1/2/13, XNMI)
SCIA/SCIB FIFO
SPI FIFO
McBSP FIFO
eCAN
EVA/EVB
12-Bit ADC
System Control
(Oscillator and PLL
+
Peripheral Clocking
+
Low-Power Modes
+
Watchdog)
Figure 3-1. Functional Block Diagram
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TMS320F2810 TMS320F2811 TMS320F2812 TMS320C2810 TMS320C2811 TMS320C2812
Memory Bus
External
INT14
Interface
(XINTF)
INT[12:1]
M0 SARAM
INT13
M1 SARAM
NMI
L0 SARAM
L1 SARAM
C28x CPU
128K x 16 (F2812)
128K x 16 (F2811)
64K x 16 (F2810)
128K x 16 (C2812)
128K x 16 (C2811)
64K x 16 (C2810)
RS
CLKIN
H0 SARAM
Memory Bus
Boot ROM
Peripheral Bus
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Real-Time JTAG
Control
Address (19)
(B)
Data (16)
1K x 16
1K x 16
4K x 16
4K x 16
Flash
ROM
(C)
OTP
1K x 16
8K x 16
4K x 16