Qdr Sram Vref Generation; Control Bwe# Signal Trace Width/Spacing Routing; Qdr Control Stack-Up Signal Cross-Section Details - Intel IXP28XX Manual

Network processors hardware design guide
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Figure 41.
Table 32.
4.6
Hardware Design Guide
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Control BWE# Signal Trace Width/Spacing Routing

T
d2
Other
T
signal
Signals
T
d1
Table 32
lists the QDR CONTROL stack-up signal cross-section details.

QDR CONTROL Stack-up Signal Cross-section Details

Trace
QDR
Parameter
Width (W)
Signal
[mils]
CONT
Value
5
ROL
QDR SRAM V
REF
The best known method for V
divider from the 1.5-V QDR supply. The following solutions can be used to generate the V
supply:
Figure 42
depicts a circuit that creates V
through an optical amplifier to create a noise-sensitive voltage reference.
Figure 43
and
Figure 44
POWER or GND Plane
20 mil or larger
W
CONTROL
Signal
Prepreg
POWER or GND Plane
Trace
D1
Trace
Thickness
Thickness
Spacing
(Tsignal)
(TD1)
(S) [mils]
[mils]
[mils]
0.5
8 - 15
5.0
Generation
generation is to derive the 0.75-V reference through a resistive
REF
through a resistive divider which is then fed
REF
show a resistor divider circuit to generate the V
IXP28XX Network Processor
QDR SRAM
S
W
D2
CONTROL
Signal
D1
3995-01
Spacing
D2
between
Thickness
Er(D1) Er(D2)
signal
(Td2)
groups
[mils]
[mils]
5.7
3.5
3.8
20 - 25
REF
supply.
REF
79

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