Qdr Sram Rpe#, Wpe#, Bwe# Control Topologies; Qdr Control Rpe# And Wpe# Signals Routing Topology; Qdr Control Rpe# And Wpe# Signal Group Routing Guidelines - Intel IXP28XX Manual

Network processors hardware design guide
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IXP28XX Network Processor
QDR SRAM
4.5.7
Figure 38.
Table 29.
76
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QDR SRAM RPE#, WPE#, BWE# Control Topologies

There are three types of control signals, and each is active low: Write Port Enable (WPE#), Read
Port Enable (RPE#), and Byte Write Enable (BWE#). These signals have to be carefully connected,
depending on how the four SRAMs are configured. The Read and the Write Port Enables can be
thought of as Address. For example, the lower read port would go to the lower address SRAMs.
The byte-writes go with groups of nine bits of data, and the use of byte-write replaces a read-
modified write operation.
Control signals are usually grouped with the Address signals because of the functional similarity
between the two groups. However they have two SRAM loads only rather than 4 as it is the case for
Address. Thus the driver buffer strength, termination resistance, trace impedance, and trace spacing
would be the same as in the Address. Only the trace length would be different and similar to the
Data-OUT for flight time matching purposes.
Alternatively, these signals can be treated as the Data-OUT signals due to their similarity in the
number of loads. In this case, the driver buffer strength, the termination resistance, the trace
impedance, and the trace spacing, and trace length would be similar to those of the Data-OUT
signal.
Figure 38
illustrates the routing topology for the QDR control RPE# and WPE# signals.

QDR Control RPE# and WPE# Signals Routing Topology

alanced T-Topology Control Signals
RPE#0, WPE#0 pins–with Top-Top SRAM
RPE#1, WPE#1 pins–with ottom- ottom SRAM
Intel
®
IXP2800 Driver
RPE#, WPE#
Table 29
provides routing guidelines for the QDR control RPE# and WPE# signal groups.
QDR Control RPE# and WPE# Signal Group Routing Guidelines (Sheet 1 of 2)
Parameter
Signal Group
Topology
Reference Plane
Characteristic Trace Impedance
RTT
Nominal Trace Width
Nominal Trace Separation
V
=0.75V
TT
R
= 35
TT
D
A
Routing Guideline
CONTROL RPE#, WPE#
Balanced-T topology
Ground
33 Ω ±10%
35 Ω ±1%
5 mils
15 mils or more
Top ( ottom)
SRAM
C
Top ( ottom)
SRAM
3958-01
Hardware Design Guide

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