Intel IXP28XX Manual page 15

Table 3.
Hardware Design Guide
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Acronyms and Terminology (Sheet 2 of 3)
Acronym/Terminology
DRCG Direct Rambus* Clock Generator
ECC Error Correction Code
EEPROM Electrically Erasable Programmable Read-only Memory
LVDS Low-Voltage Differential Signaling
Medium Access Control, a 48-bit number unique to each LAN network interface
MAC
card (NIC)
MSF Media Switch Fabric
NA Not applicable
NIC Network Interface Card
Network Processor Forum; organized to facilitate the development of next-
NPF generation networking and telecommunications products based on network
processing technologies
OIF Optical Internetworking Forum
PCB Printed circuit board
PCI Peripheral Component Interconnect
PHY physical layer device
PGA pin grid array
PLL Phase Lock Loop
POS Packet over SONET
Primary PCI, a 64-bit PCI bus operating at 33 or 66 MHz. This bus connects the
PPCI ingress and egress IXP28XX network processor to the master and slave PCI-PCI
bridge chips.
PVT Process/Voltage/Temperature
QDR SRAM Quad Data Rate Static Random Access Memory
RDRAM Rambus* Dynamic Random Access Memory
Rambus* In-line Memory Module used with RDRAM chips developed by
RIMM*
Rambus, Inc.
RPE Read Port Enable, a type of control signal that is active low
RSL Rambus* Signaling Level
Synchronous Digital Hierarchy, a set of international fiber optic transmission
SDH
standards
SF Switch Fabric
SHA-1 Secure Hash Algorithm 1
SPCI Secondary PCI, a 32-bit bus operating at 33 MHz
Interface for packet and cell transfer between a physical layer (PHY) device and
a link layer device (the IXP28XX network processor), for aggregate bandwidths of
SPI-4
OC-192 ATM and Packet over SONET/SDH (POS), as well as 10 Gb/s Ethernet
applications.
Hardware interleaving of addresses to provide balanced access to all populated
channels; the interleave size is 128 bytes. Interleaving helps to maintain
Striping utilization of available bandwidth by spreading consecutive accesses to multiple
channels. The interleaving is done in the hardware so that the three channels
appear to software as a single contiguous memory space.
IXP28XX Network Processor
Introduction
Definition
15