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SDRAM
Synchronous DRAM.
SEEPROM
Serial electrically erasable programmable read only memory.
SMBus
System management bus. The SMBus protocol is a subset of the I
smart card
A card used for user authentication or storing individual user preferences.
A search for the latest data in memory.
snoop
Southbridge
A highly integrated system I/O chip. One of three I/O subsystem bridge chips.
SPOR
System power-on reset.
SPP
Standard parallel port.
SRAM
Static random access memory.
SunVTS
A diagnostic application for testing hardware.
superscalar
A processor that can execute more than one instruction per cycle.
A privileged account with unrestricted access to all files and commands.
superuser
T
Tip connection
A connection that enables a remote shell window to be used as a terminal to
display test data from a system using the terminal interface protocol (Tip).
TPE
Twisted-pair Ethernet.
TOD
Time of day. A timekeeping integrated circuit.
U
UltraDMA
Ultra direct memory access. A DMA mode within an IDE controller.
UltraSPARC IIIi
The high-performance central processing unit used in the Sun workstations.
The CPU uses SPARC V9, 64-bit reduced instruction set computer (RISC)
architecture.
USB
Universal Serial Bus. USB 1.1 can transfer data up to 12 Mbps. USB 2.0 can
transfer data up to 480 Mbps.
Unshielded twisted-pair.
UTP
2
C protocol.
Glossary-7
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