Overview; Pull-Up And Pull-Down Resistor Values - Intel 440GX Design Manual

Design Checklist
3.1

Overview

The following checklist is intended to be used for schematic reviews of Intel
desktop designs. It does not represent the only way to design the system, but provides
recommendations based on the Intel
3.2

Pull-up and Pull-down Resistor Values

Pull-up and pull-down values are system dependent. The appropriate value for your system can be
determined from an AC/DC analysis of the pull-up voltage used, the current drive capability of the
output driver, input leakage currents of all devices on the signal net, the pull-up voltage tolerance,
the pull-up/pull-down resistor tolerance, the input high/low voltage specifications, the input timing
specifications (RC rise time), etc. Analysis should be done to determine the minimum/maximum
values that may be used on an individual signal. Engineering judgment should be used to determine
the optimal value. This determination can include cost concerns, commonality considerations,
manufacturing issues, specifications and other considerations.
A simplistic DC calculation for a pull-up value is:
Since I
Leakage
determined by the maximum allowable rise time. The following calculation allows for t, the
maximum allowable rise time, and C, the total load capacitance in the circuit, including input
capacitance of the devices to be driven, output capacitance of the driver, and line capacitance. This
calculation yields the largest pull-up resistor allowable to meet the rise time t.
A simplistic AC calculation for a pull-up value is:=
®
Intel 440GX AGPset Design Guide
®
440GX AGPset reference platform.
R = (Vcc MIN - V
MAX PU
R = (Vcc MAX - V
MIN PU
MAX is normally very small, R
R = -t / ( C * ln( 1 - (V
MAX
MIN) / I MAX
IH Leakage
MAX) / I MAX
IL OL
may not be meaningful. R
MAX
MIN / Vcc MIN) ) )
IH PU
Design Checklist
3
®
440GX AGPset
is also
MAX
3-1