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3.6.2
DIMM Solution With FET Switches
•
With existing 64Mbit technology, 512 MB, 1 GB and 2 GB support for servers and
workstations must have 4 double sided DIMMs.
•
500 ohm - 1K ohm pull-down resistors on each of the second inputs (1A2, 2A2, etc.) are
recommended on the FET switches (500 ohms is recommended based on simulation) to
prevent a direct short to ground while switching.
Figure 3-3. Current Solution With Existing FET Switches
8 2 4 4 3 G X
•
All 72 DQ lines are fed through the FET switch.
•
The current FET switch is Pericom PI5C16212A, package type A56. See third-party vendor
list for more FET switch vendors.
•
12 functional units per part requires 6 devices on motherboard.
3.6.3
Registered SDRAM
•
There may be power and thermal considerations for registered DIMMs. If a design is going to
support registered DIMMs, the DIMM spacing may need to be evaluated based on mechanical
and cooling issues.
•
REGE, pin 147 on all the DIMMs needs a 0 ohm pull-up to enable registered DIMMs.
•
Data lines are directly connected to the SDRAM components, while all address and control
signals are registered. The clock signal is routed via a PLL to all the SDRAM devices.
•
Access to registered DIMMs requires an additional clock of leadoff latency, programmable in
the 82443GX.
®
Intel
440GX AGPset Design Guide
DQ 0-71
R 7 1
R 0
DQA 0-71
F E T
S W
DQB 0-71
FENA
Design Checklist
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v009.vsd
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