Intel 440GX Design Manual page 7

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Intel 440GX AGPset Design Guide
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Intel Pentium II Processor / Intel
System Block Diagram..................................................................................1-4
Major Signal Sections (82443GX Top View).................................................2-1
Example ATX Placement for a UP Pentium
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Intel 440GX AGPset Design .......................................................................2-2
Example NLX Placement for a UP Intel
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Intel 440GX Design.....................................................................................2-3
Four Layer Board Stack-up...........................................................................2-4
Six Layer Board Stack-up With 4 Signal Planes and 2 Power Planes..........2-4
Six Layer Board Stack-up With 3 Signal Planes and 3 Power Planes..........2-5
Recommended Topology for Single Processor Design ................................2-6
Solution Space for Single Processor Design (Based on Results
of Parametric Sweeps)..................................................................................2-7
Recommended Topology for Dual Processor Design...................................2-8
Topology for Single Processor Designs With Single-End
Termination (SET).........................................................................................2-9
Solution Space for Single Processor Designs With Single-End
Termination (SET).........................................................................................2-9
GTL+ Design Process.................................................................................2-12
Pre-layout simulation process.....................................................................2-14
AGP Connector Layout Guidelines .............................................................2-19
On-board AGP Compliant Device Layout Guidelines .................................2-21
FET Switch Example...................................................................................2-22
Registered SDRAM DIMM Example ...........................................................2-23
Matching the Reference Planes and Adding Decoupling Capacitor ..........2-24
4 DIMMs (Single or Double-Sided) .............................................................2-24
Motherboard Model-Data (MDxx), 4 DIMMs.............................................2-25
Motherboard Model-DQMA[0,2:4,6:7], 4 DIMMs ......................................2-26
Motherboard Model-DQM_A[1,5], 4 DIMMs .............................................2-26
Motherboard Model-DQM_A[1,5], 4 DIMMs .............................................2-26
Motherboard Model-DQM_B[1,5], 4 DIMMs .............................................2-27
Motherboard Model-CS_A#/CS_B#, 4 DIMMs .........................................2-27
Motherboard Model-SRAS_A#, 4 DIMMs.................................................2-27
Motherboard Model-Data (MDxx) Lines, 4 DIMMs (No FET) ...................2-30
PCI Bus Layout Example ............................................................................2-31
82443GX Decoupling..................................................................................2-31
Clock Trace Spacing Guidelines.................................................................2-32
AGP Clock Layout.......................................................................................2-34
Pull-up Resistor Example..............................................................................3-2
GCKE & DCLKWR Connections...................................................................3-9
Current Solution With Existing FET Switches .............................................3-15
Series Resistor Placement for Primary IDE Connectors.............................3-21
Dual Footprint Flash Layouts ......................................................................3-25
nterfacing Intel's Flash with PIIX4E in Desktop ..........................................3-26
Interfacing Intel's Flash with PIIX4E in Desktop .........................................3-28
PWRGOOD & PWROK Logic .....................................................................3-29
LAI Probe Input Circuit..................................................................................4-3
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440GX AGPset
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II processor/
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Pentium II processor /
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