Intel® IQ80333 I/O Processor
Hardware Reference Section
3.9.6
Detail Descriptions of Switches/Jumpers
3.9.6.1
Switch S1C2: Intel
This switch resets 80333.
3.9.6.2
Switch S6A1: BPCI-X Reset
This switch resets the PCI-X B segment bus.
3.9.6.3
Switch S8A1: Rotary
Table 20.
Rotary Switch Settings
Position
0
Factory Default
1
2-F
For more information, please see
3.9.6.4
Switch S7A1
This 10 pin switch that allows the user to enable or disable various features. Please see specifics
below.
3.9.6.4.1
S7A1-1: PCI-X Bus A Speed Enable Corresponding to
Signal Name PBI_AD3
This switch allows the user to force the PCI-X bus A to run at 133 MHz or 100 MHz.
Table 21.
S7A1-1: PCI-X Bus A Speed Enable
S7A1-1
Open
Closed
3.9.6.4.2
S7A1-2: Reset I/O Processor Core Corresponding to
Signal Name PBI_AD5
RESET MODE is latched at the de-asserting edge of P_RST# and it determines when the 80333 is held
in reset until the Intel XScale
40
®
80333 I/O Processor Reset
Enables private devices on the secondary PCI-X slot. Redboot uses this setting to configure
private devices
Disables private devices on the secondary PCI-X slot. This setting allows the host to see all
the devices on the secondary PCI bus.
These settings are meaningless to Redboot. Other applications may use these settings for
configuration or software utilization.
Section 3.6.6, "Rotary Switch" on page
Enables 133 MHz on PCI-X bus A
Enables 100 MHz on PCI-X bus A (Default Mode)
®
core Reset bit is cleared in the PCI Configuration and Status Register.
Description
33.
Operation Mode
Customer Reference Board Manual