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Intel® IQ80333 I/O Processor
Hardware Reference Section
3.9.6.8
Jumper J7B4: SMBus Header
Table 37.
Jumper J7B4: Descriptions
Jumper
J7B4
Table 38.
Jumper J7B4: Settings and Operation Mode
J7B4
Pins 1, 2
Pins 3, 4
Pins 5, 6
Pins 7, 8
Pins 9, 10
Pins 11, 12
3.9.6.9
Jumper J9D3: Buzzer Volume Control
Table 39.
Jumper J9D3: Descriptions
Jumper
J9D3
Table 40.
Jumper J9D3: Settings and Operation Mode
J9D3
Pins 2, 3
Pins 1, 2
NC
44
Description
SMBus Header
Connects SM_SCLK to EEPROM U7B2 (Default Mode).
Connects SM_SDTA to EEPROM U7B2 (Default Mode).
Connects SM_SCLK to GE_SMCLK (for GBE control)
Connects SM_SDTA to GE_SMDAT(for GBE control)r
Connects SM_SCLK to PE_SMCLK (for PCI-E bus control)
Connects SM_SDTA to PE_SM_SDAT (for PCI-E bus control)
Description
Buzzer Volume
Buzzer Volume Soft
Buzzer Volume Loud.
Buzzer Volume Off.
Factory Default
1-2, 3-4
Operation Mode
Factory Default
Open
Operation Mode
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