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Intel® IQ80333 I/O Processor
Hardware Reference Section
3.9
Switches and Jumpers
3.9.1
Switch Summary
Please note that the term 'open' refers to the individual pin of switch S7A1 being pushed in at bottom
(small dot on pin away from the 'open' label on the switch). The term 'closed' refers to the pin being
pushed in at the top. Please see
more details.
Table 15.
Switch Summary
Switch
S1C1
S6A1
S7A1-1
S7A1-2
S7A1-3
S7A1-4
S7A1-5
S7A1-6
S7A1-7
S7A1-8
S7A1-9
S7A1-10
S8A1
3.9.2
Default Switch Settings of S7A1- Visual
Table 16.
Switch S7A1
Closed
S7A1
1
Figure 11.
Default Switch Setting Switch S7A1
38
Figure 11, "Default Switch Setting Switch S7A1" on page
Association
80333
Reset
BPCI-X
Reset
APCI-X Bus
PCI-XBus A Speed Set
IOP
RESET: Sets IOP Reset-Mode operation
IOP
RETRY: Sets IOP RETRY-Mode operation
BPCI-X Bus
PCI-X Bus B speed set
BPCI-X Bus
PCI-X Bus B Hot Plug Reset
BPCI-X Bus
Hot Plug Capable Disable
SMBUS Bus
SMBUS Manageability address bit 5
SMBUS Bus
SMBUS Manageability address bit 3
SMBUS Bus
SMBUS Manageability address bit 2
SMBUS Bus
SMBUS Manageability address bit 1
CPLD
Rotary Switch
Open
Open
Closed
S7A1
S7A1
S7A1
2
3
4
1
2
3
Description
Closed
Closed
Open
S7A1
S7A1
S7A1
5
6
7
4
5
6
7
8
O p e n
Customer Reference Board Manual
38, for
Factory
Default
Closed
Closed
Closed
Closed
Position 1
Open
Open
S7A1
S7A1
8
9
1 0
9
Open
Open
Open
Open
Open
Open
Open
S7A1
10
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