Symbol PDT 7500 Series Product Reference Manual page 130

PDT 7500 Series Product Reference Guide for DOS
Table A-2. PDT 7500 Interrupt Definitions (Continued)
DOS IRQ
Name
Interrupt ID Name
SYSINTR_SCANNER_SOS
SYSINTR_SCANNER_ZIF
SYSINTR_SCANNER_DECODE
SYSINTR_SCANNER_SPARE1
SYSINTR_SCANNER_ SPARE2
SYSINTR_SCANNER_SPARE3
XMI
A-10
Win CE
IRQ Name
Interrupt ID#
34
33
D
32
31
30
29
XMI
N/A
Interrupt Interrupt
Source Description
Internal to SOS Interrupt Non-decoded scanner
ASIC (ASIC
QSNAC)
ASIC Input ZIF Interrupt Single or dual stage
Pin
Internal to UART 3
ASIC (ASIC Interrupt
UART 3)
ASIC Input Spare
Pin
ASIC Input Spare
Pin
ASIC Input Spare
Pin
Elan XMI from
GPIO_CS0 ASIC
Pin
XMI Soft XMI
Multiplex
Interrupt
Clock Ready
Battery Eject
Power Key
Keyboard
Multiplex
Smart Battery
Data Ready
Notes/Comments
DBP data ready
trigger status change.
Decoded scanner
transfer activity.
ASIC Pin reserved for
future expansion
ASIC Pin reserved for
future expansion
ASIC Pin reserved for
future expansion
Software generated
XMI by writing to
ASIC register.
Clock control module
indication that clocks
are ready for high
speed mode
Battery eject switch
status change
Physical Power Switch
ASIC Keyboard
multiplex register
Smart Battery data
transfer complete.