Lpc Super I/O (Sio)/Lpc Slot; Serial, Irda; Intel® 82802 Firmware Hub Device Support; System Management Controller (Smc)/Keyboard Controller (Kbc) - Intel Core 2 Duo Processor User Manual

Development kit with ddr3 system memory
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3.6.17

LPC Super I/O (SIO)/LPC Slot

A SMSC SIO1007 serves as the SIO on the development board and is located at U7E3.
Shunting the jumper at J7E1 to the 2-3 positions can disable the SIO by holding it in
reset. This allows other SIO solutions to be tested in the LPC slot at J8E1. A sideband
header is provided at J9G1 for this purpose. This sideband header also has signals for
LPC power management. Information on this header is on sheet 49 of the Silver
Cascade schematics and is detailed in the "LPC Slot and Sideband Header
Specification".
3.6.18

Serial, IrDA

The SMSC SIO chip incorporates a serial port, and IrDA (Infrared), as well as general
purpose IOs (GPIO). The Serial Port connector is provided at J2A2, and the IrDA
transceiver is located at U6A1. The IrDA transceiver supports SIR (slow IR), FIR (Fast
IR) and CIR (Consumer IR). The option to select between these is supported through
software and GPIO pin (IR_MODE) on the SIO.
3.6.19
Intel® 82802 Firmware Hub Device Support
It should be noted that the development board does not include an Intel 82802
Firmware Hub Device. Intel 82802 Firmware Hub Device support is provided through
the TPM header (J9A1). A Port 80 card with an Intel 82802 Firmware Hub Device
assembled can be used.
3.6.20
System Management Controller (SMC)/Keyboard
Controller (KBC)
A Renesas* H8S/2117 (U9G2) serves as both System Management Controller (SMC)
and Keyboard Controller (KBC) for the development board. The SMC/KBC controller
supports two PS/2 ports, battery monitoring and charging, wake/runtime SCI events,
CPU thermal monitoring/Fan control, GMCH thermal throttling support, LPC docking
support and power sequencing control.
The two PS/2 ports on the development board are for legacy keyboard and mouse.
The keyboard plugs into the bottom jack and the mouse plugs into the top jack at
J1A1. Scan matrix keyboards can be supported via an optional connector at J9E1.
36
Development Board Features
Development Kit User's Manual

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