Mitsubishi Electric MELSEC Q Series User Manual page 187

(3) Assurance of data sent between CPUs
The old data and the new data may be mixed (data separation) in each CPU due to the timing of receiving data
from the other CPU and reading in the host CPU.
The following shows the method to realize the data consistency of the user data for the data transmission in the
multiple CPU high speed transmission function.
(a) Preventing 32-bit data separation
Accessing to the user setting area of the multiple CPU high speed transmission area with placing the address
of even number in front (for example, address 10002) can realize the data consistency for 32 bit data.
[ DMOV D0 U3E
D0
4 - 41
\G10002 ]
Device memory CPU shared memory
G10000
G10001
G10002
Even address
G10003
G10004