Mitsubishi Electric MELSEC Q Series User Manual page 181

Transmission side program (CPU No.1)
Write
command
M100
M0
1) CPU No.1 stores the send data to D0 to D9.
2) CPU No.1 turns on the data setting completion bit (MO).
Writes the above data to the auto refresh area of the CPU No.1 send area at the
END processing of the CPU No.1.
Sends the data in the auto refresh area of the CPU No.1 send area to the CPU No.2.
Reads the received data to the specified device at END processing of CPU No.2.
3) CPU No.2 detects the send data setting completion.
4) CPU No.2 performs the receive data processing.
5) CPU No.2 turns on the receive data processing complete bit (M32).
Writes the above data 5) to the auto refresh area of the CPU No.2 send area at the
END processing of the CPU No.2.
Sends the data in the multiple CPU high speed transmission area of the CPU No.2 to
the CPU No.1.
Reads the received data to the specified device at END processing of CPU No.1.
6) CPU No.1 detects that the receive data processing complete bit turns on and turns off the data setting
complete bit.
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(Transmission side (CPU No. 1))
M0 M32 1)
Set send data
from D0 to D9.
2)
SET M0
6)
M32
RST M0
RST
Figure 4.38 Interlock program example
Receive side program (CPU No.2)
(Reception side (CPU No. 2))
3)
4)
M0 M32
Operation using
receive data
(D0 to D9)
7)
M0 M32
5)
SET M32
RST M32