Signal Groups 1 - Intel BX80605X3430 - Xeon 2.4 GHz Processor Datasheet

Electrical Specifications
Table 7-3. Signal Groups (Sheet 1 of 2)
Signal Group
System Reference Clock
DDR3 Reference Clocks
DDR3 Command Signals
Single Ended
DDR3 Data Signals
Single ended
TAP (ITP/XDP)
Single Ended
Single Ended
Single Ended
Control Sideband
Single Ended
Single Ended
Single Ended
Single Ended
Single Ended
Single Ended
Single Ended
Single Ended
Single Ended
Datasheet, Volume 1
1
Alpha
Group
Differential (a)
Differential (b)
2
Differential (c)
2
(d)
2
(e)
Differential (f)
(g)
(h)
(i)
(ja)
(jb)
(k)
(l)
(m)
(n)
(o)
(p)
(qa)
Type
BCLK[0], BCLK#[0],
CMOS Input BCLK[1], BCLK#[1],
PEG_CLK, PEG_CLK#
CMOS Output BCLK_ITP, BCLK_ITP#
SA_CK[3:0], SA_CK#[3:0]
DDR3 Output
SB_CK[3:0], SB_CK#[3:0]
SA_RAS#, SB_RAS#,
SA_CAS#, SB_CAS#
SA_WE#, SB_WE#
SA_MA[15:0], SB_MA[15:0]
SA_BS[2:0], SB_BS[2:0]
SA_DM[7:0]
DDR3 Output
SM_DRAMRST#
SA_CS#[3:0], SB_CS#[3:0]
SA_CS#[7:4], SB_CS#[7:4]
SA_ODT[3:0], SB_ODT[3:0]
SA_CKE[3:0], SB_CKE[3:0]
DDR3 Bi-directional SA_DQ[63:0], SB_DQ[63:0]
SA_DQS[8:0], SA_DQS#[8:0]
SA_ECC_CB[7:0]
DDR3 Bi-directional
SB_DQS[8:0], SB_DQS#[8:0]
SB_ECC_CB[7:0]
CMOS Input TCK, TDI, TMS, TRST#, TDI_M
CMOS Open-Drain TDO, TDO_M
Output
Asynchronous CMOS TAPPWRGOOD
Output
VCCPWRGOOD_0,
Asynchronous CMOS
Input
VCCPWRGOOD_1, VTTPWRGOOD
Asynchronous CMOS SM_DRAMPWROK
Input
Asynchronous Output RESET_OBS#
Asynchronous GTL PRDY#, THERMTRIP#
Output
Asynchronous GTL Input PREQ#
GTL Bi-directional CATERR#, BPM#[7:0]
Asynchronous Bi- PECI
directional
Asynchronous GTL Bi- PROCHOT#
directional
CFG[17:0], PM_SYNC,
CMOS Input
PM_EXT_TS#[1:0]
Signals
4 4
, SB_DM[7:0]
3
3
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