Memory Reference And Compensation; Reset And Miscellaneous Signals - Intel BX80605X3430 - Xeon 2.4 GHz Processor Datasheet

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6.2

Memory Reference and Compensation

Table 6-4.

Memory Reference and Compensation

Signal Name
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
SM_RCOMP[2:0]
6.3

Reset and Miscellaneous Signals

Table 6-5.
Reset and Miscellaneous Signals (Sheet 1 of 2)
Signal Name
CFG[17:0]
COMP0
COMP1
COMP2
COMP3
FC_x
PM_EXT_TS#[1:0]
PM_SYNC
52
Description
Channel A and B Output DDR3 DIMM DQ Reference Voltage.
System Memory Impedance Compensation.
Description
Configuration signals:
The CFG signals have a default value of 1 if not
terminated on the board.
• CFG[1:0]: PCI Express Bifurcation
®
Intel Xeon
processor 3400 series:
11 = 1 x16 PCI Express
10 = 2 x8 PCI Express
01 = 4 x4 PCI Express (requires Intel 3420 or
3400 Chipset)
00 = Reserved
• CFG[2]: Reserved configuration land. A test point
may be placed on the board for this land.
• CFG[3]: Reserved configuration land.
• CFG[6:4]: Reserved configuration lands. A test
point may be placed on the board for this land.
• CFG[17:7]: Reserved configuration lands. Intel
does not recommend a test point on the board for
this land.
Impedance compensation must be terminated on the
system board using a precision resistor. Refer to
Table 7-9
for the termination requirement.
Impedance compensation must be terminated on the
system board using a precision resistor. Refer to
Table 7-9
for the termination requirement.
Impedance compensation must be terminated on the
system board using a precision resistor. Refer to
Table 7-9
for the termination requirement.
Impedance compensation must be terminated on the
system board using a precision resistor. Refer to
Table 7-9
for the termination requirement.
Future Compatibility (FC) signals are signals that are
available for compatibility with other processors. A test
point may be placed on the board for these lands.
External Thermal Sensor Input: If the system
temperature reaches a dangerously high value, this
signal can be used to trigger the start of system
memory throttling.
Power Management Sync: A sideband signal to
communicate power management status from the
platform to the processor.
Signal Description
Direction
Type
O
Analog
I
Analog
Direction
Type
I
CMOS
I
Analog
I
Analog
I
Analog
I
Analog
I
CMOS
I
CMOS
Datasheet, Volume 1

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