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User Manual
Mnemonic
SETNB reg/mem8
SETNC reg/mem8
SETAE reg/mem8
SETZ reg/mem8
SETE reg/mem8
SETNZ reg/mem8
SETNE reg/mem8
SETBE reg/mem8
SETNA reg/mem8
SETNBE reg/mem8
SETA reg/mem8
SETS reg/mem8
SETNS reg/mem8
SETP reg/mem8
SETPE reg/mem8
SETNP reg/mem8
SETPO reg/mem8
SETL reg/mem8
SETNGE reg/mem8
SETNL reg/mem8
SETGE reg/mem8
SETLE reg/mem8
SETNG reg/mem8
SETNLE reg/mem8
SETG reg/mem8
SFENCE
SHL reg/mem8,1
SHL reg/mem8,CL
SHL reg/mem8,imm8
SHL reg/mem16,1
SHL reg/mem16,CL
SHL reg/mem16,imm8
SHL reg/mem32,1
SHL reg/mem32,CL
SHL reg/mem32,imm8
SHL reg/mem64,1
SHL reg/mem64,CL
Appendix A
AMD Confidential
Instruction
Opcode
0F 93
Set byte if not below (CF = 0).
0F 93
Set byte if not carry (CF = 0).
0F 93
Set byte if above or equal (CF = 0).
0F 94
Set byte if zero (ZF = 1).
0F 94
Set byte if equal (ZF = 1).
0F 95
Set byte if not zero (ZF = 0).
0F 95
Set byte if not equal (ZF = 0).
Set byte if below or equal (CF = 1 or
0F 96
ZF = 1).
Set byte if not above (CF = 1 or ZF =
0F 96
1).
Set byte if not below or equal (CF =
0F 97
0 and ZF = 0).
Set byte if above (CF = 0 and ZF =
0F 97
0).
0F 98
Set byte if sign (SF = 1).
0F 99
Set byte if not sign (SF = 0).
0F 9A
Set byte if parity (PF = 1).
0F 9A
Set byte if parity even (PF = 1).
0F 9B
Set byte if not parity (PF = 0).
0F 9B
Set byte if parity odd (PF = 0).
0F 9C
Set byte if less (SF <> OF).
Set byte if not greater or equal (SF
0F 9C
<> OF).
0F 9D
Set byte if not less (SF =OF).
Set byte if greater or equal (SF =
0F 9D
OF).
Set byte if less or equal (ZF = 1 or
0F 9E
SF <> OF).
Set byte if not greater (ZF = 1 or SF
0F 9E
<> OF).
Set byte if not less or equal (ZF = 0
0F 9F
and SF = OF).
Set byte if greater (ZF = 0 and SF =
0F 9F
OF).
Force strong ordering of (serialized)
0F AE F8
store operations.
Shift
D0 /4
location left 1 bit.
Shift
D2 /4
location
specified in the CL register.
Shift
location
C0 /4 ib
specified
value.
Shift
D1 /4
location left 1 bit.
Shift
D3 /4
location
specified in the CL register.
Shift
location
C1 /4 ib
specified
value.
Shift
D1 /4
location left 1 bit.
Shift
D3 /4
location
specified in the CL register.
Shift
location
C1 /4 ib
specified
value.
Shift
D1 /4
location left 1 bit.
Shift
D3 /4
location
specified in the CL register.
September 12
Description
an
8-bit
register
or
an
8-bit
register
or
left
the
number
an
8-bit
register
or
left
the
number
by
an
8-bit
immediate
a
16-bit
register
or
a
16-bit
register
or
left
the
number
a
16-bit
register
or
left
the
number
by
an
8-bit
immediate
a
32-bit
register
or
a
32-bit
register
or
left
the
number
a
32-bit
register
or
left
the
number
by
an
8-bit
immediate
a
64-bit
register
or
a
64-bit
register
or
left
the
number
th
, 2008
Supported
memory
memory
of
bits
memory
of
bits
memory
memory
of
bits
memory
of
bits
memory
memory
of
bits
memory
of
bits
memory
memory
of
bits
215
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