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User Manual
Mnemonic
CMPS mem16,mem16
CMPS mem32,mem32
CMPS mem64,mem64
CMPSB
CMPSW
CMPSD
CMPSQ
CMPXCHG reg/mem8,reg8
CMPXCHG reg/mem16,reg16
CMPXCHG reg/mem32,reg32
CMPXCHG reg/mem64,reg64
CMPXCHG8B
CPUID
DAA
DAS
DEC reg/mem8
DEC reg/mem16
DEC reg/mem32
DEC reg/mem64
DEC reg16
DEC reg32
DIV reg/mem8
DIV reg/mem16
Appendix A
AMD Confidential
Instruction
Opcode
Compare the word at DS:rSI with the
A7
word at ES:rDI and then increment or
decrement rSI and rDI.
Compare the doubleword at DS:rSI with
A7
the
doubleword
increment or decrement rSI and rDI.
Compare the quadword at DS:rSI with
A7
the
quadword
increment or decrement rSI and rDI.
Compare the byte at DS:rSI with the
A6
byte at ES:rDI and then increment or
decrement rSI and rDI.
Compare the word at DS:rSI with the
A7
word at ES:rDI and then increment or
decrement rSI and rDI.
Compare the doubleword at DS:rSI with
A7
the
doubleword
increment or decrement rSI and rDI.
Compare the quadword at DS:rSI with
A7
the
quadword
increment or decrement rSI and rDI.
Compare
register
0F B0 /r
equal, copy the second operand to the
first
first operand to AL.
Compare
register
0F B1 /r
equal, copy the second operand to the
first
first operand to AX.
Compare EAX register with a 32-bit
register
0F B1 /r
equal, copy the second operand to the
first
first operand to EAX.
Compare RAX register with a 64-bit
register
0F B1 /r
equal, copy the second operand to the
first
first operand to RAX.
Compare
memory location. If equal, set the
zero flag (ZF) to 1 and copy the
0F C7 /1 m64
ECX:EBX
location. Otherwise, copy the memory
location
zero flag.
Executes
0F A2
number is in the EAX register.
27
Decimal adjust AL.
2F
Decimal adjusts AL after subtraction.
Decrement the contents of an 8-bit
FE /1
register or memory location by 1.
Decrement the contents of a 16-bit
FF /1
register or memory location by 1.
Decrement the contents of a 32-bit
FF /1
register or memory location by 1.
Decrement the contents of a 64-bit
FF /1
register or memory location by 1.
Decrement the contents of a 16-bit
48 +rw
register by 1.
Decrement the contents of a 32-bit
48 +rd
register by 1.
Perform unsigned division of AX by
the contents of an 8-bit register or
F6 /6
memory
quotient in AL and the remainder in
AH.
Perform unsigned division of DX:AX by
the contents of a 16-bit register or
F7 /6
memory
quotient in AX and the remainder in
DX.
September 12
Description
at
ES:rDI
and
at
ES:rDI
and
at
ES:rDI
and
at
ES:rDI
and
AL
register
with
an
or
memory
location.
operand.
Otherwise,
copy
AX
register
with
a
or
memory
location.
operand.
Otherwise,
copy
or
memory
location.
operand.
Otherwise,
copy
or
memory
location.
operand.
Otherwise,
copy
EDX:EAX
register
to
register
to
the
to
EDX:EAX
and
clear
the
CPUID
function
location
and
store
location
and
store
th
, 2008
Supported
then
then
then
then
8-bit
If
the
16-bit
If
the
If
the
If
the
64-bit
memory
the
whose
the
the
199
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