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Mnemonic
RCL reg/mem8,imm8
RCL reg/mem16,1
RCL reg/mem16,CL
RCL reg/mem16,imm8
RCL reg/mem32,1
RCL reg/mem32,CL
RCL reg/mem32,imm8
RCL reg/mem64,1
RCL reg/mem64,CL
RCL reg/mem64,imm8
RCR reg/mem8,1
RCR reg/mem8,CL
RCR reg/mem8,imm8
RCR reg/mem16,1
RCR reg/mem16,CL
RCR reg/mem16,imm8
RCR reg/mem32,1
RCR reg/mem32,CL
RCR reg/mem32,imm8
210
AMD Confidential
Instruction
Opcode
Rotate the 9 bits consisting of the
carry flag and an 8-bit register or
C0 /2 ib
memory location left the number of
bits specified by an 8-bit immediate
value.
Rotate the 17 bits consisting of the
D1 /2
carry flag and a 16-bit register or
memory location left 1 bit.
Rotate the 17 bits consisting of the
carry flag and a 16-bit register or
D3 /2
memory location left the number of
bits specified in the CL register.
Rotate the 17 bits consisting of the
carry flag and a 16-bit register or
C1 /2 ib
memory location left the number of
bits specified by an 8-bit immediate
value.
Rotate the 33 bits consisting of the
D1 /2
carry flag and a 32-bit register or
memory location left 1 bit.
Rotate the 33 bits consisting of the
carry flag and a 32-bit register or
D3 /2
memory location left the number of
bits specified in the CL register.
Rotate the 33 bits consisting of the
carry flag and a 32-bit register or
C1 /2 ib
memory location left the number of
bits specified by an 8-bit immediate
value.
Rotate the 65 bits consisting of the
D1 /2
carry flag and a 64-bit register or
memory location left 1 bit.
Rotate the 65 bits consisting of the
carry flag and a 64-bit register or
D3 /2
memory location left the number of
bits specified in the CL register.
Rotate the 65 bits consisting of the
carry flag and a 64-bit register or
C1 /2 ib
memory location left the number of
bits specified by an 8-bit immediate
value.
Rotate the 9 bits consisting of the
D0 /3
carry flag and an 8-bit register or
memory location right 1 bit.
Rotate the 9 bits consisting of the
carry flag and an 8-bit register or
D2 /3
memory location right the number of
bits specified in the CL register.
Rotate the 9 bits consisting of the
carry flag and an 8-bit register or
C0 /3 ib
memory location right the number of
bits specified by an 8-bit immediate
value.
Rotate the 17 bits consisting of the
D1 /3
carry flag and a 16-bit register or
memory location right 1 bit.
Rotate the 17 bits consisting of the
carry flag and a 16-bit register or
D3 /3
memory location right the number of
bits specified in the CL register.
Rotate the 17 bits consisting of the
carry flag and a 16-bit register or
C1 /3 ib
memory location right the number of
bits specified by an 8-bit immediate
value.
Rotate the 33 bits consisting of the
D1 /3
carry flag and a 32-bit register or
memory location right 1 bit.
Rotate the 33 bits consisting of the
carry flag and a 32-bit register or
D3 /3
memory location right the number of
bits specified in the CL register.
Rotate the 33 bits consisting of the
carry flag and a 32-bit register or
C1 /3 ib
memory location right the number of
bits specified by an 8-bit immediate
value.
September 12
Description
Appendix A
h
, 2008
Supported
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