Figure 9-34. Sustained Ultradma Data Out Burst Timing Diagram - AMD Geode SC1200 Data Book

Electrical Specifications
IDE_IOR0#
(HSTROBE0#)
at host
IDE_DATA[15:0]
at host
IDE_IOR0#
(HSTROBE0#)
at device
IDE_DATA[15:0]
at device
Note: IDE_DATA[15:0] and IDE_IOR[0:1]# (HSTROBE[0:1]#) signals are shown at both the device and the host to
emphasize that cable settling time and cable propagation delay do not allow the data signals to be considered sta-
ble at the device until a certain amount of time after they are driven by the device.

Figure 9-34. Sustained UltraDMA Data Out Burst Timing Diagram

AMD Geode™ SC1200/SC1201 Processor Data Book
t
2CYC
t
CYC
t
t
DVS
DVH
t
DVH
t
t
t
DH
DS
DH
t
CYC
t
2CYC
t
t
DVS
DVH
t
t
DH
DS
32579B
413