Table 6-21. F2Bar4: Ide Controller Support Registers Summary; Table 6-22. F3: Pci Header Registers For Audio Support Summary - AMD Geode SC1200 Data Book

Core Logic Module - Register Summary

Table 6-21. F2BAR4: IDE Controller Support Registers Summary

F2BAR4+ Width
I/O Offset (Bits) Type
00h 8 R/W
01h --- ---
02h 8 R/W
03h --- ---
04h-07h 32 R/W
08h 8 R/W
09h --- ---
0Ah 8 R/W
0Bh --- ---
0Ch-0Fh 32 R/W

Table 6-22. F3: PCI Header Registers for Audio Support Summary

Width
F3 Index (Bits) Type
00h-01h 16 RO
02h-03h 16 RO
04h-05h 16 R/W
06h-07h 16 RO
08h 8 RO
09h-0Bh 24 RO
0Ch 8 RO
0Dh 8 RO
0Eh 8 RO
0Fh 8 RO
10h-13h 32 R/W
14h-2Bh --- ---
2Ch-2Dh 16 RO
2Eh-2Fh 16 RO
30h-FFh --- ---
AMD Geode™ SC1200/SC1201 Processor Data Book
Name
IDE Bus Master 0 Command Register — Primary
Not Used
IDE Bus Master 0 Status Register — Primary
Not Used
IDE Bus Master 0 PRD Table Address — Primary
IDE Bus Master 1 Command Register — Secondary
Not Used
IDE Bus Master 1 Status Register — Secondary
Not Used
IDE Bus Master 1 PRD Table Address — Secondary
Name
Vendor Identification Register
Device Identification Register
PCI Command Register
PCI Status Register
Device Revision ID Register
PCI Class Code Register
PCI Cache Line Size Register
PCI Latency Timer Register
PCI Header Type Register
PCI BIST Register
Base Address Register 0 (F3BAR0) — Sets the base address for
the memory mapped VSA audio interface control register block
(summarized in Table 6-23).
Reserved
Subsystem Vendor ID
Subsystem ID
Reserved
32579B
Reset Reference
Value (Table 6-36)
00h Page 260
--- Page 260
00h Page 260
--- Page 260
00000000h Page 260
00h Page 261
--- Page 261
00h Page 261
--- Page 261
00000000h Page 261
Reset Reference
Value (Table 6-37)
100Bh Page 262
0503h Page 262
0000h Page 262
0280h Page 262
00h Page 262
040100h Page 262
00h Page 262
00h Page 262
00h Page 262
00h Page 262
00000000h Page 262
00h Page 262
100Bh Page 262
0503h Page 262
00h Page 262
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