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The Analog Output circuit consists of a 12-bit resolution Digital to Analog Converter (DAC),
a V to I circuit, and a V to V circuit. The 12-bit DAC dives the V to I circuitry. A scaling
circuit within the V to I circuit drives the V to V circuitry. V to I and V to V circuitry are
powered by an external power source.
A CPLD generates the control signals for the ADC, multiplexer, EEPROM, Bus Interface
and E
PROM that contains the calibration data.
2
2.3.4.5.1 Analog Input/Output Configurations
AI/O and AI Modules are provided with Configuration Jumpers that accommodate
configuration of each of the six Analog Inputs. Analog Input can be individually configured
for 1-5V or 4-20mA operation. Field wiring assignments are provided in Figure 2-20.
Cable shields associated with AI wiring should be connected to the ControlWave EFM's
Chassis Ground. Multiple shield terminations will require a user supplied copper ground
bus. This ground bus must be connected to the ControlWave EFM's Chassis Ground Lug
(using up to a #4 AWG wire size) and must accommodate a connection to a known good
Earth Ground (in lieu of a direct connection from the Ground Lug) and to all AI cable
shields. Shield wires should use an appropriate Terminal Lug and should be secured to
the copper bus via industry rugged hardware (screw/bolt, lockwasher and nuts).
Analog Input/Output Modules are provided with two Analog Outputs that are individually
jumper configurable for 1-5V or 4-20mA AO operation. The maximum external load that
can be connected to the 4-20mA output is 250 ohms (with an external 11V power source) or
650 ohms (with an external 24V power Source). The maximum external load current for the
1-5V output is 5mA (with an external 11 to 30 V power source). AO operation requires an
11 to 30Vdc power source connected to the VEXT terminal of the AI/O Module.
Table 2-9 - Analog Input/Output/Analog Input Module Jumper Assignments
Jumper
JP1 - JP6
Configures AI1 through
AI6 (respectively)
JP7
AO1 Field Output
JP8
AO2 Field Output
JP9
AO1 Output Status
JP10
AO2 Output Status
J1
Configure ISP Connector
W1
Program Serial EEPROM
* Note: JP7 & JP9 Operation Must Match, i.e., both set for 1-5V or 4-20mA
JP8 & JP10 Operation Must Match, i.e., both set for 1-5V or 4-20mA
2.3.4.6 Non-isolated High Speed Counter Input Module (see Figure 2-21)
Non-isolated High Speed Counter Input (HSC) Modules provide a total of 4 inputs provided
with surge suppression bandwidth limiting and 20 microsecond (50kHz) filtering. HSC
Module inputs may be individually field configured with contact debounce circuitry enabled
or disabled and for 2mA or 200uA (low power) operation. When debounce circuitry is
enabled, spurious pulses caused by relay contact bounce are reduced with filters. HSC
CI-ControlWave EFM
Note:
Purpose
Pins 1-2 installed = 4-20 mA AI
Pins 2-3 installed = 1-5V AI
Pins 1-2 installed = 4-20 mA AO
Pins 2-3 installed = 1-5V AO
Pins 1-2 installed = 4-20 mA AO
Pins 2-3 installed = 1-5V AO
Pins 1-2 installed = 1-5V AO
Pins 2-3 installed = 4-20 mA AO
Pins 1-2 installed = 1-5V AO
Pins 2-3 installed = 4-20 mA AO
Factory Use ONLY
Factory Use ONLY
Notes
Installation & Operation / 2-33
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