AGB Programming Manual
4) DMA Control
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Address
Register
DMA0
0BAh
CNT_H
DMA0CNT_H [d15] DMA Enable Flag
A setting of 0 disables DMA.
A setting of 1 enables DMA, and after the transfer is completed the source
and destination registers are restored to their last values.
[Note] Delay of 2 waits will occur before DMA is activated after this flag is
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DMA Transfer Type
0: 16-bit Transfer
1: 32-bit Transfer
DMA Start Timing
00: Start Immediately
01: Start in a V-blank Interval
10: Start in an H-blank Interval
11: Prohibited Code
Interrupt Request Enable Flag
0: Disable
1: Enable
DMA Enable Flag
0: OFF
1: ON
set. Accessing DMA related registers during this time may cause a
DMA malfunction. Do another process or insert a dummy load
command instead.
Destination Address Control Flag
00: Increment after Transfer
01: Decrement after Transfer
10: Fixed
11: Increment/Reload after Transfer
Source Address Control Flag
00: Increment after Transfer
01: Decrement after Transfer
10: Fixed
11: Prohibited Code
DMA Repeat
0: OFF
1: ON
110
DMA Transfer
Initial
Attributes
Value
R/W
0000h
D.C.N. AGB-06-0001-002B4