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Nintendo GAME BOY ADVANCE Programming Manual

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Programming Manual 
Version 1.35
 1999-2005 NINTENDO
 AGB-06-0001-002-B13
Released: May 27, 2005

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  • Page 1 Programming Manual  Version 1.35  1999-2005 NINTENDO   AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 2 "Confidential" These coded instructions, statements, and computer programs contain proprietary information of Nintendo of America I nc. and/or Nintendo Company Ltd., and are pro- tected by Federal copyright law. They may not be disclosed to third parties or copied or duplicated in any form, in whole or in part, without the prior written consent of Nin- tendo.

  • Page 3: Table Of Contents

    May 25, 2005 Table of Contents Contents Revision History............................xiii Introduction ............................. xxi Using This Manual ..........................xxii The Game Boy Advance System ......................1 System Overview........................1 System Configuration ..........................3 CPU Block Diagram........................3 Complete Block Diagram ......................4 Memory Configuration and Access Widths................5 Little-Endian..........................5 Game Boy Advance Memory.......................7...
  • Page 4 Game Boy Advance Programming Manual May 25, 2005 Color Palettes ............................61 Color Palette Overview ......................61 7.1.1 16 Colors x 16 Palettes ....................61 7.1.2 256 Colors x 1 Palette....................61 7.1.3 Color 0 Transparency ....................61 Color Palette RAM ........................62 Color Data Format ........................63 Window Feature ..........................
  • Page 5 13.5.7 [Type/Status Data Request] Command(00h) Received..........128 13.5.8 [JOY Bus Data Write] Command(15h) Received ............129 13.5.9 [JOY Bus Data Read] Command(14h) Received............129 13.6 Game Boy Advance Game Link Cable ..................131 14 Key Input ............................133 14.1 Key Status ..........................133 14.2 Key Interrupt Control......................133 14.2.1 Interrupt Conditions......................133...
  • Page 6 Game Boy Advance Programming Manual May 25, 2005 17.1.2 Multiple Calls........................146 18 ROM Registration Data ........................149 18.1 Start Address .........................149 18.2 Nintendo Logo Character Data ....................149 18.3 Game Title ..........................149 18.4 Game Code ...........................149 18.5 Maker Code ...........................149 18.6 96h............................149 18.7 Main Unit Code........................149...
  • Page 7 May 25, 2005 Tables Table 1 - Game Boy Advance Memory Configuration and Access Widths..........5 Table 2 - Game Pak Memory Wait Control Values ..................11 Table 3 - Wait Control Values and Wait Cycles ..................12 Table 4 - Game Pak Bus Terminals......................13 Table 5 - Game Boy Advance Display Screen Features .................15...
  • Page 8 Figure 1 - Bit Operation Attribute Symbols .....................xxii Figure 1 - Game Boy Advance CPU Block Diagram..................3 Figure 2 - Complete Game Boy Advance System Block Diagram............. 4 Figure 3 - Game Boy Advance CPU Memory Addresses (Little-Endian)...........5 Figure 4 - Game Boy Advance System Memory Map................7 Figure 5 - The WAITCNT Register......................10...
  • Page 9 Figure 101 - Multi-Player Communication Connection Status ...............113 Figure 102 - Multi-player Communication Timing Chart ................114 Figure 103 - Multi Player Game Boy Advance Game Link Cable Connecting Diagram ......115 Figure 104 - The SIOMLT_SEND Register....................115 Figure 105 - Multi-Player Data Registers....................115 Figure 106 - Multi-Player Data Transitions ....................116...
  • Page 10 Figure 119 - JOY Bus Send Data Registers ..................127 Figure 120 - The JOYSTAT Register.....................127 Figure 121 - Game Boy Advance Game Link Cable Connection Types..........131 Figure 122 - The KEYINPUT Register ....................133 Figure 123 - The KEYCNT Register ......................133 Figure 124 - The IME Register.......................135...
  • Page 11 Equation 10 - Determining the Output Frequency ...................80 Equation 11 - Determining the Length of 1 Step (steptime)..............82 Equation 12 - Determining the Length of the Output Sound ..............82 Equation 13 - Selecting the Shift Clock Frequency..................83 © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 12 Game Boy Advance Programming Manual May 25, 2005  AGB-06-0001-002-B13 © 1999-2005 NINTENDO Released: May 27, 2005...

  • Page 13: Revision History

    Write, GBA Data Read -> JOY Bus Data Read • Modified conditions for canceling Stop Mode. • Added to [Stop Function Cautions]. • Changed the explanation of Device Type and added a diagram of ROM registration data. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 14 Game Boy Advance Programming Manual May 25, 2005 Revision Date Description Revised 1.22 8/10/2001 • Fixed section explaining Game Pak interrupts in the “Interrupt Control” chapter. • Added additional information to explanations about the DISPCNT regis- ter’s Individual Screens Display Flag and Forced Blank.
  • Page 15 Revision Date Description Revised 4/2/2001 • Changed the picture in the Game Boy Advance introduction in the begin- ning paragraph. • Added a caution regarding clearing of IME and IE in the chapter “Inter- rupt Control”. • Added additional description of an error flag and ID flag for multi-play communication.
  • Page 16 Game Boy Advance Programming Manual May 25, 2005 Revision Date Description Revised 4/2/2001 • Changed the names of following registers according to header files pro- vided by Nintendo. (Cont.) --Wait Control-- 204h WSCNT _ WAITCNT --Color Special Effects-- 050h BLDMOD _ BLDCNT...
  • Page 17 • Revised the hours you can play continuously from “about 20 hours” to “about 15 hours”. • Revised the illustrations of the Game Boy Advance hardware and the Multi Player Communication Cable in the multi play communication dia- gram. •...
  • Page 18 • Deleted the checksum of ROM registration data and revised the diagram. • Revised the diagram for “Game Boy Advance Game Link Cable” in the “Communication Function”. • Revised the number of DMG sold from tens of millions to a hundred mil- lion in the Game boy Advance introduction.
  • Page 19 03/10/2000 • Improved the description of interrupt and multiple interrupt process. • Improved the description of system call and multiple system call process. 03/08/2000 • Added the description of ROM registration data. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 20 Game Boy Advance Programming Manual May 25, 2005 Revision Date Description Revised 0.4.1 02/25/2000 • Changed the method to specify OBJ size. • Corrected misprints in the communication control register. 02/24/2000 • Added the PWM sampling cycle control function. 02/22/2000 •...

  • Page 21: Introduction

    32768 COLORS  COMPATIBLE FOR CGB 32BIT RISC CPU 16MHz  Game Boy Advance (GBA, or sometimes AGB) stresses portability and focuses on 2D rather than 3D image processing functions, resulting in a cutting-edge portable game device with revolutionary capabili- ties. It provides window-like functions, rotation, scaling,  blending, and fade-in/fade-out features that can be...

  • Page 22: Using This Manual

    Unrestricted bit Fixed-value bit Can be set to either 0 or 1. Must be set to a specified fixed value. 3. Abbreviations Nintendo's game hardware is abbreviated as follows: • DMG: Game Boy • CGB: Game Boy Color  • GBA or AGB: Game Boy® Advance •...

  • Page 23: The Game Boy Advance System

    Serial communication (8 bit/32 bit, UART, Multi-player, General-purpose, JOY Bus) Game Pak Like the original Game Boy and Game Boy Color, Game Boy Advance is equipped with a 32-pin connector for Game Pak connection. When a Game Pak is inserted, Game Boy Advance automatically detects its type and switches to either Game Boy Color or Game Boy Advance mode.
  • Page 24 The following Game Paks operate on the Game Boy Advance system. 1. DMG Game Paks, DMG/CGB dual mode Game Paks, and CGB dedicated Game Paks 2. GBA-dedicated Game Paks (Game Paks that only function with Game Boy Advance)  AGB-06-0001-002-B13 © 1999-2005 NINTENDO...

  • Page 25: System Configuration

    May 25, 2005 System Configuration CPU Block Diagram Figure 1 - Game Boy Advance CPU Block Diagram Game Pak CPU     6    1 Game Pak I/F (Prefetch Buffer) VRAM_A  ARM7TDMI (64KByte) (16.78MHz)    6    1 BG Processing Circuit R:16/32 W:16/32 Control R:8/16/32    6...

  • Page 26: Complete Block Diagram

    Game Boy Advance Programming Manual May 25, 2005 Complete Block Diagram Figure 2 - Complete Game Boy Advance System Block Diagram  AGB Unit  LCD Module -15V 2.5V 3.3V 13.6V 2.9"Reflective TFT Color LCD Regulator IC   r 240 x 160 x RGB Dot   e...

  • Page 27: Memory Configuration And Access Widths

    Little-Endian In the Game Boy Advance CPU, memory addresses are allocated in 8-bit increments, and little-endian for- mat is used in implementing the 8-, 16-, and 32-bit access widths. Figure 3 - Game Boy Advance CPU Memory Addresses (Little-Endian) Memory Register  ...
  • Page 28 Game Boy Advance Programming Manual May 25, 2005  AGB-06-0001-002-B13 © 1999-2005 NINTENDO Released: May 27, 2005...

  • Page 29: Game Boy Advance Memory

    May 25, 2005 Game Boy Advance Memory Overall Memory Map The following is the overall memory map of the Game Boy Advance system. Figure 4 - Game Boy Advance System Memory Map 0FFFFFFFh 0E00FFFFh Game Pak RAM Images (0 - 512 Kbits)

  • Page 30: Memory Configuration

    Game Boy Advance programming, do not perform processing based on these results. Be aware that the memory access methods in Nintendo DS differ fr om those in Game Boy Advance, Game Boy Advance-SP, and Game Boy Player and therefore, the values obtained when reading unmapped areas are very likely to differ.

  • Page 31: Game Pak Memory

    The area beginning from 0E000000h is the Game Pak RAM area. Up to 512 kilobits of SRAM or Flash Memory can be stored here. However, it is an 8 bit data bus. Due to the specifications, any Game Pak device other than ROM must be accessed using Nintendo's library. Game Pak Memory Wait Control  Although the 32 MB Game Pak memory space is mapped to the area from 08000000h onward, the 32 MB...

  • Page 32: Figure 5 - The Waitcnt Register

    Game Boy Advance Programming Manual May 25, 2005 Figure 5 - The WAITCNT Register  Initial 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00  Address Register Attributes Value 204h WAITCNT 0000h Game Pak RAM...

  • Page 33: Table 2 - Game Pak Memory Wait Control Values

    Wait cycles for the Game Pak RAM can be set. The relation between the wait control settings and wait cycles is as follows. Use the appropriate settings for the device you are using. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 34: Access Timing

    Game Boy Advance Programming Manual May 25, 2005 Table 3 - Wait Control Values and Wait Cycles Wait Control Value Wait Cycles 3.3.1 Access Timing The following timing charts illustrate Game Pak ROM access with 3 wait cycles on the first access and 1 wait cycle on the second.

  • Page 35: Game Pak Bus

    VDD (3.3V) Write Flag Write Flag Read Flag Read Flag ROM Chip Selection ROM Chip Selection Terminals used for both  A0 Address address (lower) and data AD10 AD11 AD12 AD13 AD14 AD15 © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 36 Game Boy Advance Programming Manual May 25, 2005 Table 4 - Game Pak Bus Terminals (Continued) Game Pak ROM Access Game Pak RAM Access Terminal Terminal Address (upper) Data /CS2 /CS2 RAM Chip Selection /IREQ and Terminal used for IREQ...

  • Page 37: Lcd

    May 25, 2005 The Game Boy Advance uses a 2.9-inch-wide reflective TFT color LCD screen. The vertical blanking interval of Game Boy Advance is longer than that of DMG and CGB, and its horizon- tal blanking interval is fixed. Figure 8 - Display Screen Horizontal and Vertical Blanking Intervals...

  • Page 38: Lcd Status

    Game Boy Advance Programming Manual May 25, 2005 LCD Status 4.1.1 V Counter   The VCOUNT register can be used to read which of the total of 228 LCD lines (see "Figure 8 - Display Screen Horizontal and Vertical Blanking Intervals"...
  • Page 39 DISPSTAT [d01] H-Blank Status Can check whether a horizontal blanking interval is currently in effect. DISPSTAT [d00] V-Blank Status Can check whether a vertical blanking interval is currently in effect. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 40 Game Boy Advance Programming Manual May 25, 2005  AGB-06-0001-002-B13 © 1999-2005 NINTENDO Released: May 27, 2005...

  • Page 41: Image System

    May 25, 2005 Image System Game Boy Advance can use different image systems depending on the purpose of the software. These display-related items are changed mainly using the DISPCNT register. Figure 11 - The DISPCNT Register  15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00  Address...
  • Page 42 0 for rendering; a setting of 1 selects the contents of frame buffer 1 for rendering. DISPCNT [d03] (CGB Mode) Game Boy Advance is equipped with two CPUs. In Game Boy Advance mode, a 32-bit RISC CPU starts, and in CGB mode, an 8-bit CISC CPU starts.

  • Page 43: Modes

    5.1.1 Details of BG Modes In Game Boy Advance, changing the BG mode allows character format and bitmap format to be used selectively, as appropriate. In modes 0, 1, and 2, rendering to the LCD screen is performed in a character format suitable for the game.

  • Page 44: Table 7 - Background Mode Details (Bitmap Format Bg Screen)

    Game Boy Advance Programming Manual May 25, 2005 Table 7 - Background Mode Details (Bitmap Format BG Screen) Bitmap Format BG Screen Features Frame No. of Mode Rotation No. of Memory Colors Size  /Scaling Screens 240 x 160 32,768 O O O O...

  • Page 45: Vram Memory Map

    "6.1.3 VRAM Address Mapping of BG Data" on page 30. In addition, see the descriptions in subsequent sections of this document for more information on the mem- ory areas and the data formats for each area. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 46 Game Boy Advance Programming Manual May 25, 2005  AGB-06-0001-002-B13 © 1999-2005 NINTENDO Released: May 27, 2005...

  • Page 47: Rendering Functions

    May 25, 2005 Rendering Functions The Game Boy Advance CPU has 96 KB of built-in VRAM. Its rendering functions include BG and OBJ display capability. The method used for BG rendering varies with the BG mode, as described below. Character Mode BG (BG Modes 0-2) In character mode, the components of the BG screen are basic characters of 8 x 8 pixels.

  • Page 48: Figure 13 - Background Screen Control Registers

    Game Boy Advance Programming Manual May 25, 2005 The contents of the BG control registers are shown below. 6.1.1.1 Text BG Screen Control (BG0, BG1) Figure 13 - Background Screen Control Registers 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00  Address...

  • Page 49: Table 9 - Screen Size Settings

    Virtual screen size: 512 x 512 d15,d14]=[1,0] (256 x 256) (256 x 256) (256 x 256) Display Screen Display Screen (240 x 160) (240 x 160) (256 x 256) (256 x 256) (256 x 256) © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 50: Figure 16 - Rotation/Scaling Background Screen Sizes

    Game Boy Advance Programming Manual May 25, 2005 (2) Illustration of Screen Sizes for Rotation/Scaling BG Screens Figure 16 - Rotation/Scaling Background Screen Sizes [d15,d14]=[0,0] [d15,d14]=[0,1] Virtual screen size: 128 x 128 Virtual screen size: 256 x 256 or  (128 x 128) or ...

  • Page 51: Mosaic Size

    45 46 47 48 49 00 00 00 00 51 52 53 54 55 56 00 00 00 00 60 61 62 63 64 68 69 70 71 72 73 74 77 78 79 © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 52: Vram Address Mapping Of Bg Data

    Game Boy Advance Programming Manual May 25, 2005 6.1.3 VRAM Address Mapping of BG Data BG data (BG character and screen data) are stored in the 64-KB BG area of VRAM. 6.1.3.1 BG Character Data The starting address for referencing BG character data can be specified using the character base block specification of the BG control register.

  • Page 53: Figure 19 - Vram Base Blocks For Background Data

    4000h Base Block 8 Base Block 7 Base Block 6 Base Block 5 Base Block 4 Base Block 0 Base Block 3 Base Block 2 Base Block 1 0000h Base Block 0 © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 54: Character Data Format

    Game Boy Advance Programming Manual May 25, 2005 6.1.4 Character Data Format There are two formats for character pixel data, 16 color x 16 palettes and 256 colors x 1 palette. The same format is used for OBJ and BG.

  • Page 55: Screen Data Format

    BG control register. The number of screen data items specified per BG depends on the screen size setting in the BG control register. BG screen data for text and rotation/scaling screens are specified in the following formats. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 56: Figure 22 - Text Background Screen Format

    Game Boy Advance Programming Manual May 25, 2005 6.1.5.1 Text BG Screen  A text BG screen consists of 2 byt es of screen data per basic character ; 1,024 character types can be specified. Figure 22 - Text Background Screen Format...

  • Page 57: Screen Data Address Mapping For The Lcd Screen

    Character Mode BG (BG Modes 0-2) Cautions for VRAM Game Boy Advance provides a high degree of freedom in using the BG area of VRAM. Consequently, in managing VRAM, the following points deserve particular attention. 1. There are 2 formats for BG character data (defined by 16 and 256 colors), and these can be used together.

  • Page 58: Figure 25 - Virtual Screen Size Of 512 X 256 Pixels (Text Background)

    Game Boy Advance Programming Manual May 25, 2005 Figure 25 - Virtual Screen Size of 512 x 256 Pixels (Text Background) 512 pixels (64 blocks) 256 pixels 256 pixels (32 blocks) (32 blocks)  A 000H 002H 004H 006H 800H  A...

  • Page 59: Figure 27 - Virtual Screen Size Of 512 X 512 Pixels (Text Background)

    Figure 28 - Virtual Screen Size of 128 x 128 Pixels (Rotation/Scaling Background) 240 pixels (30 blocks) 128 pixels (16 blocks) 000H 001H 002H 003H 004H 010H 011H 012H 013H 014H 128 pixels (16 blocks) 160 pixels (20 blocks) LCD display area © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 60: Figure 29 - Virtual Screen Size Of 256 X 256 Pixels (Rotation/Scaling Background)

    Game Boy Advance Programming Manual May 25, 2005 Figure 29 - Virtual Screen Size of 256 x 256 Pixels (Rotation/Scaling Background) 256 pixels (32 blocks) 240 pixels (30 blocks) 000H 001H 002H 003H 004H 020H 041H 042H 043H 044H 040H...

  • Page 61: Figure 31 - Virtual Screen Size Of 1024 X 1024 Pixels (Rotation/Scaling Background)

    180H 181H 182H 183H 184H 980H 981H 982H 983H 984H  A  A  A  A  A  A  A  A  A 1024 pixels (128 blocks) 00H 3 80H 3 82H 3 LCD display area © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 62: Rotation And Scaling Features

    Game Boy Advance Programming Manual May 25, 2005 6.1.7 BG Rotation and Scaling Features Rotation and scaling of the BG as a whole can be performed in a rotation/scaling BG screen. With rotation, BG data is referenced as shown in the following figure.

  • Page 63: Figure 33 - Registers For Setting The Starting Point Of Bg Data

    May 25, 2005 Character Mode BG (BG Modes 0-2) BG rotation and scaling are implemented in Game Boy Advance using the following arithmetic expres- sions. Equation 1 - Background Rotation and Scaling Parameters used in rotation and scaling operations are specified for BG2 and BG3 in the following regis- ters.

  • Page 64: Scrolling

    Game Boy Advance Programming Manual May 25, 2005 6.1.7.1 Operations Used in BG Rotation/Scaling Processing 1. Using software, the user determines the results of the rotation/scaling operation for the left-upper coor- dinate of the display screen and sets this as the starting point of the BG data reference in registers BG2X_L, BG2X_H, BG2Y_L, BG2Y_H, BG3X_L, BG3X_H, BG3Y_L, and BG3Y_H.

  • Page 65: Bitmap Mode Bgs (Bg Modes 3-5)

    "6.1.7 BG Rotation and Scaling Features" on page 40. With Bitmap BG, if the displayed portion exceeds the edges of the screen due to the rotation/scaling oper- ation, that area becomes transparent. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 66: Pixel Data

    Game Boy Advance Programming Manual May 25, 2005 6.2.3 Pixel Data In the bitmap modes, only the amount of pixel data corresponding to the size of the display screen can be stored in VRAM. Available bitmap modes allow the simultaneous display of 32,768 colors (BG modes 3 and 5) and the display of 256 of the 32,768 colors (BG mode 4).

  • Page 67: Table 11 - Bg Mode 4 (Frame 0)

    A004h A0ECh A0EDh A0EEh A0EFh A0F0h A0F1h A0F2h A0F3h A0F4h A1DCh A1DDh A1DEh A1DFh A1E0h A1E1h A1E2h A1E3h A1E4h A2CCh A2CDh A2CEh A2CFh A2D0h A2D1h A2D2h A2D3h A2D4h A3BCh A3BDh A3BEh A3BFh © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 68: Table 13 - Bg Mode 5 (Frame 0)

    Game Boy Advance Programming Manual May 25, 2005 Table 12 - BG Mode 4 (Frame 1) A3C0h A3C1h A3C2h A3C3h A3C4h A4ACh A4ADh A4AEh A4AFh 13240h 13241h 13242h 13243h 13244h 1332Ch 1332Dh 1332Eh 1332Fh 13330h 13331h 13332h 13333h 13334h 1341Ch...

  • Page 69: Obj (Object)

    “x 4” expresses the number of cycles that the OBJ Rendering Circuit can use per one pixel. “- 6” repr esents the number of cycles needed for processing before OBJ rendering at the start of the H Line. © 1999-2005 NINTENDO AGB-06-0001-002-B13...

  • Page 70: Character Data Mapping

    Game Boy Advance Programming Manual May 25, 2005 The “Number of Rendering Cycles” and the corresponding number of OBJ displayable for a single line is expressed in the table below. Table 16 - Rendering Cycles and the Corresponding Number of Displayable Objects...

  • Page 71: Figure 40 - Vram 2-Dimensional Mapping For Obj Characters

    Setting DISPCNT register bit [d06] to 1 results in the 1-dimensional mapping mode shown in the following figure. The data that comprise a character are stored in contiguous addresses. Figure 41 - VRAM 1-Dimensional Mapping for OBJ Characters © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 72: Oam

    Game Boy Advance Programming Manual May 25, 2005 VRAM Basic Character  With OBJ Character Display OBJ Character Storage Area  Unit Image b20h n+2 n+3 16 x 32-pixel character  (256 colors x 1 palette format) n+4 n+5 1 basic character  n+6 n+7...

  • Page 73: Figure 42 - Writing Rotation/Scaling Parameters To Oam

    Rotation/Scaling Parameter PD-31  Attribute 2  Attribute 1 OBJ127  Attribute 0 Rotation/Scaling Parameter PB-0  Attribute 2 OBJ1  Attribute 1  Attribute 0 Rotation/Scaling Parameter PA-0  Attribute 2 OBJ0  Attribute 1  Attribute 0 07000000h 16 Bits © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 74: Figure 43 - Obj Attribute 0

    Game Boy Advance Programming Manual May 25, 2005 Figure 43 - OBJ Attribute 0 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 y-coordinate y-coordinate Rotation/Scaling Flag 0: OFF 1: ON Rotation/Scaling Double-Size Flag...

  • Page 75: Figure 44 - Cropping When Displaying A Scaled Or Rotated Object

    It is possible to control the ON and OFF functions of the OBJ display individually by setting in the combina- tion of this double size flag and the rotation/scaling flag of [d08]. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 76: Figure 45 - Cropping When Displaying A Magnified Character

    Game Boy Advance Programming Manual May 25, 2005 In case of (double size flag, rotation/scaling flag) = (1, 0), OBJ is not displayed, but is displayed in other cases. [d08] Rotation/Scaling Flag  Allows rotation processing for the OBJ to be enabled and disabled.

  • Page 77: Figure 46 - Obj Attribute 1

      a    t   n   o    i   z   r   o    H 8x16 8x32 16x32 32x64    l   e   g   n   a    t   c   e    R    l   a    i   c    t   r   e    V Prohibited Code © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 78: Figure 48 - Obj Attribute 2

    Game Boy Advance Programming Manual May 25, 2005 [d13] [d12] Vertical and Horizontal Flip Flags  Allows the OBJ to be flipped horizontally and vertically.  A normal display is produced by a setting of 0 and a flip display by a setting of 1.

  • Page 79: Obj Rotation/Scaling Feature

    The processing in step 2) above, is then performed. 6.3.4.2 Rotation/Scaling Parameters Specifies the direction of character data reference in OBJ rotation/scaling processing. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 80: Display Priority Of Obj And Bg

    Game Boy Advance Programming Manual May 25, 2005 The values set for PA, PB, PC, and PD are signed, fixed-point numbers (8-bit fractional portion, 7-bit inte- ger portion, 1-bit sign, for a total of 16 bits). These 4 parameters are used together as a single group, which can be placed in any of 32 areas in OAM.

  • Page 81: Priority Among Bgs And Objs

    When orders of OBJ number and OBJ priority are reversed, the display is not right. Please be cautious not to let this situation occur. Examples of when display is not right: • OBJ-No.0 (OBJ priority 2) • BG (BG priority 1) • OBJ-No.1 (OBJ priority 0) © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 82 Game Boy Advance Programming Manual May 25, 2005  AGB-06-0001-002-B13 © 1999-2005 NINTENDO Released: May 27, 2005...
  • Page 83 Color Palettes Color Palette Overview The LCD unit of Game Boy Advance can display 32 levels of red, 32 levels of green, and 32 levels of blue, for a total of 32,768 colors. The number of colors that can be displayed at once varies with the BG mode. See "5.1.1 Details of BG...

  • Page 84: Figure 52 - Color Palette Ram Memory Map

    Game Boy Advance Programming Manual May 25, 2005 Color Palette RAM OBJs and BGs use separate palettes. The size of palette RAM is large enough (512 bytes) to hold data (16-bit) for up to 256 colors (of 32,768) that can be specified. The memory map of the OBJ and BG palettes is shown in the follow figure.

  • Page 85: Figure 54 - Color Data Format

    May 25, 2005 Color Data Format Color Data Format  Allows 1 of 32,768 colors to be specified. Figure 54 - Color Data Format Blue Green © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 86 Game Boy Advance Programming Manual May 25, 2005  AGB-06-0001-002-B13 © 1999-2005 NINTENDO Released: May 27, 2005...

  • Page 87: Figure 55 - Window Position Setting Registers

    May 25, 2005 Window Feature The Game Boy Advance system can display 2 windows simultaneously. Display of the areas inside and outside the windows can be separately turned on and off. In addition, scrolling and color special effects such as rotation,  blending, and fade-in/fade-out can be per-...

  • Page 88: Figure 57 - The Winin Register

    Game Boy Advance Programming Manual May 25, 2005 8.2.1 Control of Inside of Window The WININ register controls display of the area inside windows 0 and 1. The high-order bits (d13-8) control Window 1, while the low-order bits (d5-0) control Window 0.

  • Page 89: Figure 59 - The Bldcnt Register

    May 25, 2005 Color Special Effects The Game Boy Advance provides the following color special effects. The area where these effects are applied can be limited using a window. Blending α Performs arithmetic operations on 2 selected surfaces and implements processing for 16 levels of semi-transparency.

  • Page 90: Table 17 - Specifications For The Bldcnt Register

    Game Boy Advance Programming Manual May 25, 2005 In addition, semi-transparent OBJs are individually specified in OAM, and color special effects for the OBJ as a whole, are specified in the BLDCNT register. These specifications are summarized in the following table.

  • Page 91: Table 18 - Eva, Evb, And Evy Values

    Display color (G) = 1st pixel color (G) x EVA + 2nd pixel color (G) ×EVB • Display color (B) = 1st pixel color (B) x EVA + 2nd pixel color (B) ×EVB © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 92: Figure 61 - Α Blending Between Obj And Bg

    Game Boy Advance Programming Manual May 25, 2005 9.2.1.2 Brightness Increase Operations • Display color (R) = 1st pixel (R) + (31 - 1st pixel (R) ) ×EVY • Display color (G) = 1st pixel (G) + (31 - 1st pixel (G) ) ×EVY •...

  • Page 93: Figure 62 - Game Boy Advance Sound System Block Diagram

    May 25, 2005 10 Sound In addition to 4 channels of CGB-compatible sound, Game Boy Advance has 2 channels of direct sound. 1. Direct Sounds A and B • Provides playback of linear 8-bit audio data. • Uses the timer and DMA.

  • Page 94: Figure 63 - Sound Fifo Input Registers

    Game Boy Advance Programming Manual May 25, 2005 10.2.1 Sound FIFO Input Registers Figure 63 - Sound FIFO Input Registers  Address Register Attributes Initial Value 0A0h FIFO_A_L Sound Data 1 Sound Data 0 0A4h FIFO_B_L  Address Register   Attributes Initial Value...

  • Page 95: Table 19 - Sound 1 Frequency Change Bits

    6/f128 (46.9 ms) 7/f128 (54.7 ms) (f128=128Hz) SOUND1CNT_L [d03] Sweep Increase/Decrease Specifies whether the frequency increases or decreases. When the sweep function is not used, the increase/decrease flag should be set to 1. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 96: Figure 65 - The Sound1Cnt_H Register

    Game Boy Advance Programming Manual May 25, 2005 SOUND1CNT_L [d02 - 00] Number of Sweep Shifts Specifies the number of sweeps. The frequency data with a single shift are determined according to the following formula, with f  signi- fying the frequency after a shift and f ...

  • Page 97: Figure 66 - Waveform Amplitude Peak Proportions

    With fdat signifying the frequency, the output frequency (f) is determined by the following formula. Equation 5 - Determining the Output Frequency Thus, the specifiable range of frequencies is 64 to 131.1 KHz. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 98: Figure 68 - The Sound2Cnt_L Register

    Game Boy Advance Programming Manual May 25, 2005 Sound 1 Usage Notes 1. When the sweep function is not used, the sweep time should be set to 0 and the sweep increase/ decrease flag should be set to 1. 2. If sweep increase/decrease flag of NR10 is set to 0, the number of sweep shifts set to a non-zero value, and sweep OFF mode is set, sound production may be stopped.

  • Page 99: Figure 69 - The Sound2Cnt_H Register

    With fdat signifying the frequency data, the output frequency is determined by the following formula. Equation 8 - Determining the Output Frequency Thus, the frequency range that can be specified is 64 to 131.1 KHz. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 100: Figure 70 - The Sound3Cnt_L Register

    RAM and output them while modifying their length, frequency, and level. The capacity of the waveform RAM of Sound 3 in Game Boy Advance (total of 64 steps) is twice that in CGB, and can be used as 2 banks of 32 steps or as 64 steps.

  • Page 101: Table 20 - Sound 3 Output Level Selections

    Sound Length Flag Frequency Data 0: Continuous 1: Counter  Initializaton Flag SOUND3CNT_X [d15] Initialization Flag When SOUND3CNT_L [d07] is 1, a setting of 1 in this bit causes Sound 3 to restart. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 102 Game Boy Advance Programming Manual May 25, 2005 SOUND3CNT_X [d14] Sound Length Flag When 0, sound is continuously output. When 1, sound is output for only the length of time specified for the sound length in NR31. When sound output ends, the Sound 2 ON flag of NR52 is reset.

  • Page 103: Figure 73 - Waveform Ram Registers

    15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Initial Value  Attributes  Address Register  WAVE_  Step 30 Step 31 Step 28 Step 29 09Eh RAM3_H © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 104: Figure 74 - The Sound4Cnt_L Register

    Game Boy Advance Programming Manual May 25, 2005 10.6 Sound 4 Sound 4 is a circuit that generates white noise with the envelope function. The contents of NR41, NR42, NR43, and NR44 for Sound 4 conform with those of CGB.

  • Page 105: Figure 75 - The Sound4Cnt_H Register

    Equation 13 - Selecting the Shift Clock Frequency However, %1110 and %1111 are prohibited codes. SOUND4CNT_H [d03] Polynomial Counter Step Number Selection  A value of 0 selects 15 steps; 1 selects 7 steps. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 106: Table 21 - Sound 4 Prescalar Input Clock Selection

    Game Boy Advance Programming Manual May 25, 2005 SOUND4CNT_H [d02 - 00] Dividing Ratio Frequency Selection Selects a 14-step prescalar input clock to produce the shift clock for the polynomial counter. With f=4.194304 MHz, selection is as shown in the following table.

  • Page 107: Figure 77 - The Soundcnt_X Register

    Each sound circuit’s status can be referenced. Each sound is set during output, and when in counter mode it is reset after the time passes which was set up with the length data. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 108: Figure 78 - The Soundcnt_H Register

    Game Boy Advance Programming Manual May 25, 2005 Figure 78 - The SOUNDCNT_H Register  15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00  Address Register   Attributes Initial Value SOUND 082h 0000h CNT_H Output Ratio for Synthesis...

  • Page 109: Figure 79 - The Soundbias Register

    Sound PWM Control Bit modulation format PWM is used in the Game Boy Advance sound circuit. When no sound is produced, the duty waveform is output, and bias voltage is provided. The PWM circuit is stopped when the setting for duty is 0h.

  • Page 110: Table 22 - Pwm Modulation Amplitude Resolution And Sampling Cycle Frequency

    Game Boy Advance Programming Manual May 25, 2005 SOUNDBIAS [d15 - 14] Amplitude Resolution/Sampling Cycle This sets the amplitude resolution and sampling cycle frequency during PWM modulation. The DMG compatible sound is input at 4 bits/130.93KHz so in order to have accurate modulation the sampling frequency must be set high.

  • Page 111: Figure 81 - Timer Setting Registers

    May 25, 2005 Timer   Game Boy Advance is equipped with 4 channels of 16-bit timers. Of these, timers 0 and 1 can be used to set the interval for the supply of data from the FIFO(s) for direct sounds A and B. This interval is set by timer overflow.

  • Page 112: Table 23 - Timer Control Prescalar Selection

    Game Boy Advance Programming Manual May 25, 2005 TM*CNT_H [d01 - 00] Prescalar Selection  Allows selection of a prescal ar based on the system clock (16.78M Hz). Table 23 - Timer Control Prescalar Selection Setting Prescalar (Count-Up Interval) System clock (59.595 ns)
  • Page 113 (In order to prevent conflict with the external bus, the CPU stops when the DMA controller is working.) Game Boy Advance has 4 DMA transfer channels. The highest priority of these channels is DMA0, followed in order by DMA1, DMA2, and DMA3.

  • Page 114: Figure 83 - Dma 0 Source Address Registers

    Game Boy Advance Programming Manual May 25, 2005 12.1.1 Source Address Specifies the source address using 27 bits. The area 00000000h-07FFFFFFh (internal memory area of main unit) can be specified. Figure 83 - DMA 0 Source Address Registers 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00  Address...

  • Page 115: Figure 86 - The Dma0Cnt_H Register

    Enables an interrupt request to be generated when DMA transfer of the specified word count has been completed. No request is generated with a setting of 0; a request is generated with a setting of 1. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 116: Table 24 - Dma Transfer Timing Selections (Dma 0)

    Game Boy Advance Programming Manual May 25, 2005 DMA0CNT_H [d13 - 12] DMA Startup Timing The timing of the DMA transfer can be selected from the following options. Table 24 - DMA Transfer Timing Selections (DMA 0) Setting DMA Startup Timing...

  • Page 117: Figure 87 - Dma 1 And 2 Source Address Registers

    15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 0C0h DMA1DAD_L 0000h 0CCh DMA2DAD_L 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00  Address Register Attributes Initial Value 0C2h DMA1DAD_H 0000h 0CEh DMA2DAD_H © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 118: Figure 89 - Dma 1 And 2 Word Count Registers

    Game Boy Advance Programming Manual May 25, 2005 12.2.3 Word Count Specifies the number of bytes transferred by DMA 1 and DMA 2, using 14 bits. The number can be speci- fied in the range 0001h~3FFFh~0000h (when 0000h is set, 4000h bytes are transferred).

  • Page 119: Figure 90 - Dma 1 And 2 Control Registers

    Enables an interrupt request to be generated when DMA transfer of the specified word count has been completed. No request is generated with a setting of 0; a request is generated with a setting of 1. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 120: Table 25 - Dma Transfer Timing Selections (Dma 1 And 2)

    Game Boy Advance Programming Manual May 25, 2005 DMA(1,2)CNT_H [d13-12] DMA Startup Timing The timing of the DMA transfer can be selected from the following options. Table 25 - DMA Transfer Timing Selections (DMA 1 and 2) Setting DMA Startup Timing...

  • Page 121: Figure 91 - Dma 3 Source Address Registers

     Address Register  Initial Value  Attributes 0D8h DMA3DAD_L 0000h 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00  Address Register   Attributes Initial Value 0DAh DMA3DAD_H 0000h © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 122: Figure 93 - The Dma3Cnt_L Register

    Game Boy Advance Programming Manual May 25, 2005 12.3.3 Word Count Specifies the number of bytes transferred by DMA 3, using 16 bits. The number can be specified in the range 0001h~FFFFh~0000h (when 0000h is set, 10000h bytes are transferred).

  • Page 123: Table 26 - Dma Transfer Timing Selections (Dma 3)

    Sets the bit length of the transfer data. With a setting of 0, the data are transferred by DMA in 16-bit (half-word) units. With a setting of 1, the data are transferred by DMA in 32-bit (word) units. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 124 Game Boy Advance Programming Manual May 25, 2005 DMA3CNT_H [d09] DMA Repeat With the DMA repeat function set to ON, if V-blanking or H-blanking intervals are selected as the tim ing of DMA startup, DMA is restarted when the next startup condition occurs (a V-blank or H-blank).
  • Page 125  Although the DMA repeat flag is ON, this DMA will be disabled after the transfer of 1 frame's worth of data. Therefore, it is necessary to re-enable the DMA enable flag for every frame to be transferred. © 1999-2005 NINTENDO AGB-06-0001-002-B13...
  • Page 126 Game Boy Advance Programming Manual May 25, 2005 12.4 DMA Problems: How to Avoid Them With DMA transfer it is possible to synchronize with H-blank, V-blank, Direct sound (DMA1,2), and Display (DMA3) (DMA repeat). However, there are some problems with this function as discussed below.
  • Page 127 DMA transfer type: • DMA repeat: • Destination address control flag: • Other control bits: No change  Please note that the DMA may be started one extra time due to procedure 1 above. Note: © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 128 Game Boy Advance Programming Manual May 25, 2005  AGB-06-0001-002-B13 © 1999-2005 NINTENDO Released: May 27, 2005...

  • Page 129: Table 27 - Communication Functions

     Always set the communication speed at 256KHz when performi ng normal communication using a Game Boy Advance Game Link Cable. Communication cannot be done properly at 2MHz. Also, please note it will be a one-way communication due to cable connection of multi-play communication.

  • Page 130: Figure 95 - Connecting During Normal Serial Communication

    When different software is connected to other device • When the communication mode is different from the other device • When the Game Boy Advance Game Link cable is connected incorrectly • When an error occurs in data due to noise 13.1 8-Bit/32-Bit Normal Serial Communication Serial transfer sends/receives simultaneously.

  • Page 131: Figure 96 - Sio Timing Chart (8-Bit Communication)

    (This data register is used for 16 bit multi-play communication as well.) Figure 97 - The SIODATA8 Register  15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00  Address Register Attributes Initial Value 12Ah SIODATA8 0000h © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 132: Figure 98 - 32-Bit Normal Serial Communication Data Registers

    Game Boy Advance Programming Manual May 25, 2005 13.1.2 32-Bit Normal Serial Communication Data Registers 32-bit transfer mode uses [120h:SIODATA32_L] and [122h:SIODATA32_H] as data registers.(These data registers are used for 16-bit multi-player communication also.) The most significant bit will be d15 in the register SIODATA32_H, and the least significant bit will be d0 in the register SIODATA32_L.
  • Page 133 CNT register is being set. (Because it transforms to a receiving data bit that is being communicated.) The 8 bit transfer mode is compatible in terms of modes with DMG/CGB, but the voltage with the commu- nication terminal varies. Therefore, communication between Game Boy Advance and DMG/CGB is not possible.

  • Page 134: Figure 100 - Normal Serial Communication Flow (Example)

    Game Boy Advance Programming Manual May 25, 2005 Figure 100 - Normal Serial Communication Flow (Example) Set (0) in (d15) of  Register RCNT Set (0,0) or (0,1) in (d13,d12) of Control Regis ter SIOCNT Set transfer data Set (1) in (d03) of Control...

  • Page 135: Figure 101 - Multi-Player Communication Connection Status

    HI, you can tell that all connected terminals have entered multi-player communication mode. The SI terminal is in pull-up input, but due to the multi player Game Boy Advance Game Link cable it becomes pull-down. Thus, once all of the terminals are in multi-player mode, the terminal that is LO input to the SI terminal becomes the master.

  • Page 136: Figure 102 - Multi-Player Communication Timing Chart

    Game Boy Advance Programming Manual May 25, 2005 Once the transmission ends, the received data is stored in each of the data registers (SIOMULTI0, SIOMULTI1, SIOMULTI2, and SIOMULTI3). If there is a terminal that is not connected the initial data FFFFh is stored.

  • Page 137: Figure 103 - Multi Player Game Boy Advance Game Link Cable Connecting Diagram

    May 25, 2005 16-Bit Multi-player Communication Figure 103 - Multi Player Game Boy Advance Game Link Cable Connecting Diagram Small Large Connecter  Connecter  13.2.2 Data Registers The data send is stored in the Register SIOMLT_SEND. Figure 104 - The SIOMLT_SEND Register ...

  • Page 138: Figure 106 - Multi-Player Data Transitions

    Game Boy Advance Programming Manual May 25, 2005 13.2.3 Data Transition Diagram Figure 106 - Multi-Player Data Transitions  AGB-06-0001-002-B13 © 1999-2005 NINTENDO Released: May 27, 2005...

  • Page 139: Figure 107 - The Siocnt Register (16-Bit)

    When set to 1, a data transfer is started. Upon completion of the data transfer, it is automatically reset. Caution Due to individual differences in Game Boy Advance hardware, there is a variation in the timing of inter- rupt occurrences. Always use a timer when sending data, so that you have an adequate interval between communications (minimum send interval + 600 clocks).

  • Page 140: Table 28 - Normal Serial Communication Baud Rates

    Game Boy Advance Programming Manual May 25, 2005 SIOCNT [d06] Communication Error Flag The communication status can be confirmed at the end of a communication. (During communication, it is not reflected properly.) If the status for this bit is 0, there is no error. If it is 1, it means an error has occurred.

  • Page 141: Figure 108 - Multi-Player Communication Flow (Example)

    During communication, a Set Communication Start Flag busy flag is set Communication is terminated and ID is confirmed If register SIOCNT's interrupt request authorization flag is set, then an interrupt request results © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 142: Figure 109 - Uart Communication

    Game Boy Advance Programming Manual May 25, 2005 13.3 UART Communication Functions UART communications can be illustrated using the following drawing. Figure 109 - UART Communication In UART communication mode, a HI level is output from the SD terminal. When the receive data register (or the receive FIFO) is full, a HI is output from the SD terminal. When it is not full, a LO is output from the SD terminal if the receive enable flag is set.

  • Page 143: Figure 112 - Serial Communication With Fifo

    Also, when read, data is read from a receive FIFO. (Only the lower 8 bits are valid.) Figure 112 - Serial Communication with FIFO Figure 113 - Example: Writing Data Registers © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 144: Figure 114 - The Siocnt Register (Uart)

    Game Boy Advance Programming Manual May 25, 2005 13.3.5 Control Register  If Register SIOCNT (d13,d12) = (1,1) is set when Register RCNT (d15) = (0), you will go to UART commu- nication mode. Figure 114 - The SIOCNT Register (UART)

  • Page 145: Table 29 - Uart Communication Error Conditions

    When FIFO is invalid, if the receive data is not empty (SIO- CNT [d05] = 0) and next receive has ended (detect stop bit). Or when FIFO is valid, if receive FIFO is full and next communication has ended (detect stop bit). © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 146: Table 30 - Uart Communication Baud Rates

    Game Boy Advance Programming Manual May 25, 2005 SIOCNT [d05] Receive Data Flag When set to 0, there is still data present. When set to 1, it is empty. SIOCNT [d04] Send Data Flag When set to 0, it is not full.

  • Page 147: Figure 115 - The Rcnt Register (General-Purpose Communication)

    When the corresponding terminal is set for input, the status (HI/LO) of the terminal can be confirmed. If the corresponding terminal is set for output, the status of the set bit is output. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 148: Figure 116 - The Rcnt Register (Joy Bus Communication)

    Game Boy Advance Programming Manual May 25, 2005 13.5 JOY Bus Communication By setting the communication function set flag to 11 for Register RCNT, JOY Bus communication mode is selected. In JOY Bus communication mode, the SI Terminal is for input, and SO Terminal is for output. SD and SC Terminals go to LO output.

  • Page 149: Figure 118 - Joy Bus Receive Data Registers

    Set this bit if the JOY_TRANS register is written by word. Reset this bit if a JOY Bus Data Read Signal is received. JOYSTAT [d01] Receive Status Flag Set this bit if a JOY Bus Data Write Signal is received. Reset this bit if the JOY_RECV register is read by word. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 150: Table 31 - The Joy Bus Reset Command

    Game Boy Advance JOY Bus communication recognizes four commands sent from the host (for example, Nintendo GameCube). These commands are: “JOY Bus Reset”, “Type/Status Data Request”, “JOY Bus Data Write”, and “JOY Bus Data Read.” Game Boy Advance operates based on the particular signal received.

  • Page 151: Table 33 - The Joy Bus Data Write Command

    If the GBA cable is disconnected and then reconnected, the Game Boy Advance may behave the same way it does when it receives a JOY Bus reset command (i.e., the JOY_IF_RESET bit of the REG_JOYCNT register is set).
  • Page 152 Game Boy Advance Programming Manual May 25, 2005 If the Game Boy Advance cannot respond to this series of SIO interrupts (due to such factors as a large DMA, an extended interrupt process, or a prolonged disabling of interrupts), then data communication will fail and incorrect values will be exchanged.

  • Page 153: Figure 121 - Game Boy Advance Game Link Cable Connection Types

    13.6 Game Boy Advance Game Link Cable When communicating between Game Boy Advance units, the Game Boy Advance Game Link cable to be used will vary depending upon the type of Game Pak used. Figure 121 - Game Boy Advance Game Link Cable Connection Types ©...
  • Page 154 Game Boy Advance Programming Manual May 25, 2005  AGB-06-0001-002-B13 © 1999-2005 NINTENDO Released: May 27, 2005...

  • Page 155: Figure 122 - The Keyinput Register

    14.1 Key Status Game Boy Advance allows input with the L and R Buttons, as well as with the START and SELECT but- tons, the +Control Pad, and A and B Buttons. The status of each of these buttons can be checked by reading the individual bits of Register KEYINPUT.
  • Page 156 Game Boy Advance Programming Manual May 25, 2005  AGB-06-0001-002-B13 © 1999-2005 NINTENDO Released: May 27, 2005...

  • Page 157: Figure 124 - The Ime Register

    May 25, 2005 15 Interrupt Control Game Boy Advance can use 14 types of maskable hardware interrupts. If an interrupt request signal is received from a hardware item, the corresponding interrupt request flag is set in the IF register. Masking can be performed individually for interrupt request signals received from each hardware item by means o f the interrupt request flag register IE.

  • Page 158: Figure 126 - The If Register

     An interrupt request occurs when the IREQ terminal is “High”.  Although the IREQ terminal is pulled “High” in the Game Boy Advance hardware, the IREQ terminal is set to “Lo” when a normal Game Pak is installed. Therefore, the IREQ terminal is pulled “High” and an interrupt request occurs when the Game Pak is removed from the Game Boy Advance.

  • Page 159: Figure 127 - System-Allocated Area In Work Ram

    The user can arbitrarily define the Interrupt Processing Routine, but as a general rule, the Monitor ROM handles this processing. For further details on each register, please refer to “ARM7TDMI Data Sheet”. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 160 Game Boy Advance Programming Manual May 25, 2005 15.5.1 Normal Interrupt 1. If an interrupt occurs, the CPU enters IRQ mode and control shifts to the Monitor ROM. In Monitor ROM, save each register (R0~R3, R12, LR_irq (former PC)) to the Interrupt Stack. The total is 6 words.
  • Page 161 When an interrupt occurs, Monitor ROM does the processing (1) again, and loads each register to the interrupt stack. USR Stack IRQ Stack SVC Stack 03007F00 03007FA0 03007FE0 LR_usr  SP_svc 6 WORDS User Interrupt Processing SPSR_irq SP_usr  6 WORDS SP_irq 03007FA0 03007F00 • Continue processing (2). © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 162 Game Boy Advance Programming Manual May 25, 2005  AGB-06-0001-002-B13 © 1999-2005 NINTENDO Released: May 27, 2005...

  • Page 163: Table 35 - System Status While In Stop Mode

    Canceling stop status requires a brief wait until the system clock stabilizes. Note: 16.1.3 System Working Status in Stop Mode The working status of each block of the Game Boy Advance system during a stop is shown in the following table. Table 35 - System Status while in Stop Mode Block...

  • Page 164: Table 36 - Terminology For Entering Sleep Mode From The Menu Screen

    Game Boy Advance Programming Manual May 25, 2005 16.1.4 Stop Function Cautions • The only way to distinguish the stopped state from the power off state is to observe the Power lamp. Therefore, it is possible that a user may fail to notice the stopped state.

  • Page 165: Table 37 - Terminology For Entering Sleep Mode Using A Buttons Shortcut

     Advance goes into sleep mode automatically without their prior knowledge.) On the Menu Screen, display the way to exit Sleep Mode. 16.1.5.2 Exiting Sleep Mode Exit from sleep mode via the simultaneous pressing of SELECT + L + R. © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...

  • Page 166: Table 39 - System Status While In Halt Mode

    16.2.3 System Working Status in Halt Mode The working status of each block of the Game Boy Advance system during a semi-stop is shown in the fol- lowing table. Table 39 - System Status while in Halt Mode...
  • Page 167 May 25, 2005 17 Game Boy Advance System Calls Please refer to the   for Game Boy Advance system calls.  AGB System Call Ref erence Manual  17.1 System Call Operation 17.1.1 Normal Calls 1. When an argument is required for the system call used, after writing to registers R0-R3 call the monitor ROM system call with the “SWI<Number>”.
  • Page 168 Game Boy Advance Programming Manual May 25, 2005 17.1.2 Multiple Calls 1. When an argument is required for the system call used, after reading to the registers, R0-R3, call the monitor ROM system call with the “SWI<Number>”. 2. Save the registers, SPSR_svc (formerly CPSR), R12, LR_svc (formerly PC) to the system call stack with the monitor ROM.
  • Page 169 12. Complete the user interrupt processing and return to the previous system call. USR Stack IRQ Stack SVC Stack 03007F00 03007FA0 03007FE0 LR_usr  SP_irq 4 WORDS Save with each SP_svc System Call SP_usr  03007F00 03007FA0 © 1999-2005 NINTENDO AGB-06-0001-002-B13 Released: May 27, 2005...
  • Page 170 Game Boy Advance Programming Manual May 25, 2005 13. Complete processing with each system call. USR Stack IRQ Stack SVC Stack 03007F00 03007FA0 03007FE0 SP_usr SP_irq 4 WORDS SP_svc 03007F00 03007FA0 14. Return value to registers R0, R1, and R3, in cases where a system call provides a return value, and then return to the user program.

  • Page 171: Figure 128 - Game Boy Advance Rom Registration Data

    Store the 32-bit ARM command “B<User program start address>”. 18.2 Nintendo Logo Character Data The Nintendo logo/character data, which is displayed when the game is started, is stored here. The Moni- tor ROM checks this data at start-up, therefore always store the data provided by Nintendo. 18.3 Game Title Store the Game title in this area.

  • Page 172: Figure 129 - Device Type Bits

    Game Boy Advance Programming Manual May 25, 2005 18.8 Device Type Store the type of device that is installed in the Game Pak. If there is a 1-megabit flash DACS (Debugging  And Communication System) (=custom 1Mbit flash Memory with security and patch functions) in a Game Pak, set the applicable bit to 1.

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