Apic Interrupt Routing; Table 15. Pci And Pci-X Interrupt Routing/Sharing; Table 16. Interrupt Definitions - Intel SE7525RP2 Technical Manual

Intel® Server Board SE7320EP2 / Intel® Server Board SE7525RP2 TPS
PCI I/O Subsystem
Interrupt
Video
82541P1
PCI Slot 3 (PCI 32b/33M)
PCI Slot 5 (PCI 32b/33M)
LSI 1020A
PCI Slot 2 (64b/66M)
PCI Slot 1 (64b/66M)
5.4.2

APIC Interrupt Routing

For APIC mode, the interrupt architecture incorporates three Intel I/O APIC devices to manage and
broadcast interrupts to local APICs in each processor. The Intel I/O APICs monitor each interrupt on
each PCI device, including PCI slots, in addition to the ISA compatibility interrupts IRQ(0-15).
When an interrupt occurs, a message corresponding to the interrupt is sent across a three-wire
serial interface to the local APICs. The APIC bus minimizes interrupt latency time for
compatibility interrupt sources. The I/O APICs can also supply greater than 16 interrupt levels to
the processor(s). This APIC bus consists of an APIC clock and two bidirectional data lines.
5.4.2.1 Legacy Interrupt Sources
The table below recommends the logical interrupt mapping of interrupt sources on the board.
The actual interrupt map is defined using configuration registers in the 6300ESB ICH.
ISA Interrupt
INTR Processor interrupt.
NMI NMI to processor.
IRQ0 System timer
IRQ1 Keyboard interrupt.
IRQ2 Slave PIC
IRQ3 Serial port 1 or 2 interrupt from Super I/O device, user-configurable.
IRQ4 Serial port 1 or 2 interrupt from Super I/O device, user-configurable.
IRQ5 Parallel Port / Generic
IRQ6 Floppy disk.
IRQ7 Parallel Port / Generic
IRQ8_L Active low RTC interrupt.
IRQ9 SCI*
IRQ10 Generic
IRQ11 Generic
IRQ12 Mouse interrupt.
IRQ13 Floaty processor.
IRQ14 Compatibility IDE interrupt from primary channel IDE devices 0 and 1.
IRQ15
SMI* System Management Interrupt. General purpose indicator sourced by the 6300ESB ICH to the
processors.
Revision 1.0

Table 15. PCI AND PCI-X Interrupt Routing/Sharing

INT A
PIRQB
PIRQA
PIRQF
PIRQE
PXIRQ3
PXIRQ1
PXIRQ0

Table 16. Interrupt Definitions

Intel order number D24635-001
INT B INT C
PIRQD PIRQB
PIRQB PIRQH
PXIRQ2 PXIRQ3
PXIRQ1 PXIRQ2
Description
INT D
PIRQH
PIRQD
PXIRQ0
PXIRQ3
37