Figure 109 - Uart Communication; Figure 110 - The Siodata8 Register; Figure 111 - Serial Communication Without Fifo - Nintendo GAME BOY ADVANCE Programming Manual

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13.3 UART Communication Functions
UART communications can be illustrated using the following drawing.
In UART communication mode, a HI level is output from the SD terminal.
When the receive data register (or the receive FIFO) is full, a HI is output from the SD terminal. When it is
not full, a LO is output from the SD terminal if the receive enable flag is set. A HI is output if it is reset.
The output of the SD terminal of the other machine is input to the SC terminal.
Once data is written to the send data register, data is sent after a "Start bit" (1 bit) is sent from the SO ter-
minal. However, when the CTS flag for the Control Register is set, data can be sent only when there is a
LO input to the SC terminal. The Stop bit is a fixed 1 bit.
13.3.1 Data Register
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Address Register
12Ah
SIODATA8
13.3.2 Relations Between Data Register, FIFO, and Shift Register
When sending or receiving, there are 4 bytes of FIFO. By using the FIFO enable flag for the control regis-
ter SIOCNT, you can select whether to use or not use FIFO.
13.3.3 When FIFO is not Used
If written to a data register SIODATA8, data is written to a send shift register, and if read, data is read from
a receive shift register. (Only the lower 8 bits are valid.)

Figure 111 - Serial Communication without FIFO

AGB-06-0001-002-B13
Released: May 27, 2005
Game Boy Advance Programming Manual

Figure 109 - UART Communication

SI
SO
SD
SC
Figure 110 - The SIODATA8 Register
SI
SO
SD
SC
Attributes
R/W
© 1999-2005 NINTENDO
May 25, 2005
Initial Value
0000h