Figure 96 - Sio Timing Chart (8-Bit Communication); Figure 97 - The Siodata8 Register - Nintendo GAME BOY ADVANCE Programming Manual

May 25, 2005
The stored data will be left-shifted by the falling edge of the shift clock, and will be output from the SO ter-
minal in order, starting from the most significant bit. The data input from the SI terminal will be input to the
least significant bit, with the rising edge of the shift clock.
13.1.1 SIO Timing Chart
The figure below illustrates 8-bit communication. In 32-bit communication, the shift clock sends and
receives 32 bits of data.

Figure 96 - SIO Timing Chart (8-bit Communication)

8 bit Normal Serial Communication Data Register
8-bit transfer mode uses SIODATA8 as a data register. The upper 8-bits will become disabled.
(This data register is used for 16 bit multi-play communication as well.)
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Address Register
12Ah
SIODATA8
© 1999-2005 NINTENDO
8-Bit/32-Bit Normal Serial Communication
Figure 97 - The SIODATA8 Register
109
Attributes Initial Value
R/W
0000h
AGB-06-0001-002-B13
Released: May 27, 2005