Table of Contents
Advertisement
Appendix B
Timing Diagrams
Time
t
PFI_i, RTSI_i, PXI_STAR_i, or any
3
internal signal
20 MHz Timebase
100 kHz Timebase
80 MHz Timebase
PXI_CLK10
Count Enable Delay
Table B-29 shows timing for the internal Count Enable signal, as shown in Figure B-41. Count
Enable enables the 32-bit counter to count on the rising edge of the Selected Source signal.
The delays depend on both the synchronization mode and gating mode for the application.
Selected_Gate
Count_Enable
B-34 | ni.com
Table B-28. Selected Source Delays Timing
From
Figure B-45. Count Enable Delays
t
4
To
Min (ns)
Selected
Source
Selected
Source
Selected
Source
Selected
Source
Selected
Source
t
4
Max (ns)
8.0
21.0
1.5
4.0
1.5
4.0
1.0
2.5
1.0
3.5
Advertisement
Table of Contents
