Synchronizing Multiple Devices; Pxi/Pxi Express Modules; Pci/Pci Express Devices; Usb Devices - National Instruments PXI-6289 User Manual

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M Series User Manual

Synchronizing Multiple Devices

The following sections contain information bout synchronizing multiple M Series devices.

PXI/PXI Express Modules

On PXI systems, you can synchronize devices to PXI_CLK10. In this application the PXI
chassis acts as the initiator. Each PXI/PXI Express module routes PXI_CLK10 to its external
reference clock.
Another option in PXI systems is to use PXI_STAR. The Star Trigger controller device acts as
the initiator and drives PXI_STAR with a clock signal. Each target device routes PXI_STAR to
its external reference clock.

PCI/PCI Express Devices

With the RTSI and PFI bus and the routing capabilities of M Series PCI/PCI Express devices,
there are several ways to synchronize multiple devices depending on your application.
To synchronize multiple devices to a common timebase, choose one device—the initiator—to
generate the timebase. The initiator device routes its 10 MHz reference clock to one of the
RTSI <0..7> or PFI <0..15> signals.
All devices (including the initiator device) receive the 10 MHz reference clock from RTSI or
PFI. This signal becomes the external reference clock. A PLL on each device generates the
internal timebases synchronous to the external reference clock.
Once all of the devices are using or referencing a common timebase, you can synchronize
operations across them by sending a common start trigger out across the RTSI or PFI bus and
setting their sample clock rates to the same value.

USB Devices

With the PFI bus and the routing capabilities of USB M Series devices, there are several ways
to synchronize multiple devices depending on your application.
To synchronize multiple devices to a common timebase, choose one device—the initiator—to
generate the timebase. The initiator device routes its 10 MHz reference clock to one of the
PFI <0..15> signals.
All devices (including the initiator device) receive the 10 MHz reference clock from PFI. This
signal becomes the external reference clock. A PLL on each device generates the internal
timebases synchronous to the external reference clock.
Once all of the devices are using or referencing a common timebase, you can synchronize
operations across them by sending a common start trigger out across the PFI bus and setting their
sample clock rates to the same value.
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