Intel 855GM/GME Chipset Based System Power Delivery Guidelines
Figure 143. GMCH HAVREF Reference Voltage Generation Circuit
R1
49.9
1%
R2
100
1%
Figure 144. GMCH HCCVREF Reference Voltage Generation Circuit
R1
49.9
1%
R2
100
1%
13.5.3.2.
GMCH AGTL+ I/O Buffer Compensation
The HXRCOMP and HYRCOMP pins of the GMCH should each be pulled-down to ground with a 27.4
Ω ± 1% resistor. See Figure 145. The maximum trace length from pin to resistor should be less than 0.5
inches and should be 18-mil wide to achieve the Zo = 27.4 Ω target. Also, the routing for HRCOMP
should be at least 25 mils away from any switching signal.
Figure 145. GMCH HXRCOMP and HYRCOMP Resistive Compensation
270
+VCCP
GMCH_HAVREF
C1
1uF
+VCCP
GMCH_HCCVREF
C3
C1
1uF
0.1uF
HXRCOMP
27.4 Ω +/- 1%
GMCH
Y22
HAVREF
C3
0.1uF
GMCH
Y28
HCCVREF
27.4 Ω +/- 1%
®
Intel
855GM/855GME Chipset Platform Design Guide
HYRCOMP
R