Chapter 1: Introduction - AMD XILINX T2 User Manual

Introduction
The Xilinx ® T2 Telco accelerator card, shown in the following figure, is a single slot, half height,
half length (HHHL) plug-in card. It is compliant with PCI Express
Gen3 x16 and Gen4 x8 bifurcated rates on the host interface.
The card features a 16 nm Zynq
targeted applications:
• 5G NR physical layer functional offload, including but not limited to:
Low-density parity check (LDPC) encoding and decoding
○
Rate matching and dematching
○
Code block (CB) and CB group (CBG) processing with HARQ buffer management logic in
○
lookaside mode
• 4G LTE physical layer functional offload, including but not limited to:
Turbo encoding and decoding
○
Rate matching and dematching
○
UG1496 (v1.0) June 15, 2022
T2 Telco Accelerator Card User Guide
Figure 1: T2 Telco Accelerator Card
®
UltraScale+™ RFSoC ZU48DR device supporting the following

Chapter 1: Introduction

Chapter 1
® technology, supporting PCIe
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