AMD XILINX T2 User Manual page 19

• In-band SC firmware update: Allows the SC firmware to be updated using PCIe technology.
The I2C interface is connected to MIO pins of the Zynq
an integrated IP solution is available. The I2C interface must be operated in slave mode and
cannot be a master because the SC is the master, and drives an SCL clock.
Reset Request Power Reduction
It might be necessary for the SC to request the Zynq
temperature or power consumption threshold has been reached. This request is made with the
following handshake signals:
• RF_CPU_RST: This signal is asserted by the SC to indicate to the Zynq
to reduce the 5G workload power. The Zynq
interface functional to enable any maintenance on telemetry operations with the ost.
• RF_RST_REQ: This signal is asserted by the Zynq
power reduction request by the SC, and to avoid a fatal power cutoff protection mechanism.
The SC is always powered.
UART – Maintenance Port Accessible
A UART port on the Zynq
be used for development purposes. The UART signals are as follows:
• RF_DBG_RX: Maintenance port UART receive
• RF_DBG_TX: Maintenance port UART transmit
The UART port is connected to MIO pins of the Zynq
integrated IP solution is available.
To use the UART through the maintenance port, you need a DMB II dongle. Refer to
Maintenance Port
General Purpose Signals
• RF_LED: A yellow LED is available as a general purpose indicator. It is located on the I/O
bracket immediately next to the green power-on LED.
Special Function Pins
The following table summarizes the special functions pin map.
UG1496 (v1.0) June 15, 2022
T2 Telco Accelerator Card User Guide
® UltraScale+™ RFSoC, accessible through the maintenance port, can
for more details.
® UltraScale+™ RFSoC PS, meaning that
® UltraScale+™ RFSoC to reduce power if a
® UltraScale+™ RFSoC must keep the PCIe
® UltraScale+™ RFSoC to acknowledge the
®
UltraScale+™ RFSoC PS, meaning that an
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Chapter 3: Pin Mapping
® UltraScale+™ RFSoC
Chapter 4:
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