Special Functions - AMD XILINX T2 User Manual

Table 3: DDR4 PS Interface Pin Map (cont'd)
Pin Number
AV30
AW30
AW29
AR28
AL32
AM33

Special Functions

FPGA Program Flash
Flash storage for FPGA images on the T2 card is implemented in dual-QSPI mode (8 bits). The
following signals comprise this interface:
• Chip selects: RF_QSPI_LWR_CS# and RF_QSPI_UPR_CS#
• Data: RF_QSPI_LWR_DQ[3:0] and RF_QSPI_UPR_DQ[3:0]
• Clocks: RF_QSPI_LWR_CLK and RF_QSPI_UPR_CLK
Additional details are as follows:
• The dual-QSPI mode flash has been implemented with two 2 Gb SPI NOR flash devices
(Micron MT25QU02GCBB8E12-0AAT).
• The MT25QU02GCBB8E12-0AAT NOR flash devices are automotive grade for thermal
design reasons.
• The flash storage supports a user image and a fallback image.
• The T2 card is shipped with a fallback image that cannot be overwritten (the password is kept
with Xilinx manufacturing).
I2C Bus to Satellite Controller
The I2C bus signals to the Zynq
These signals are used to support data transfers between the SC and RFSoC in support of the
following functions:
• In-band telemetry: Provides the host access to board power and temperature telemetry data
using PCIe technology.
UG1496 (v1.0) June 15, 2022
T2 Telco Accelerator Card User Guide
Signal Name
PS_DDR4_1_CK#
PS_DDR4_1_CKE
PS_DDR4_1_CS#
PS_DDR4_1_WE#
PS_DDR4_1_ALERT#
PS_DDR4_1_RST#
®
UltraScale+™ RFSoC are PS_SOC_SCL and PS_SOC_SDA.
Description
DDR4 Clock (N)
DDR4 Clock Enable
DDR4 Chip Select
DDR4 Write Enable
DDR4 Alert
DDR4 Reset
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Chapter 3: Pin Mapping
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