Sch06_Main Dsp Dir Fpga - Denon DRA-100 Service Manual

1 2 3
A
FPC1401
1.0-16-11PB-2
DTCK
DTDO
VCC_ADSP
DTMS
B
DTRST
DEMU
DTDI
ADI_FLAG0
ADI_MUTE_ON/OFF
C
1B
C1418
FPGA_R1
FPGA_R2
FPGA_R3
AUX_SEL
FPGA_RST
FPGA_MUTE
- C1415
FS-STS-A0
1
D R1405
10N-K
-
FS-STS-A1 2
R1404
R1402
3
VER_CONT
R1403
10K
4
-
FS-STS-B0 C1414
OSC1401 5
10N-K
22M5792
FS-STS-B1
R1401 6
1 4 7
FS-STS-B2 E/D VDC C1413
-
8
R1410
EMPHASIS 10N-K
2 3
9
GND OUT
AMUTE C1412
100
10
C1401 100N-K 10N-K
C1411
11
10N-K
ADI_FLAG0 12
C1410
E
13
ADI_MUTE_ON/OFF 10N-K
C1409
14
10N-K
ADI_RST
R1419
15
100
ADI_SPI_MOSI
16
R1420
ADI_SPI_MISO 17
100
ADI_SPI_CLK 18
R1421
19
100
C1408
20
10N-K
ADI_SPI_CS 21
TO B1 R1422
22
100
F
6A
1V2_DSP
3V3_DSP
TO A6
C1407 C1406 C1404 C1403
10000N-K 10000N-K 10000N-K
GND
3V3_DIR
GND
G
5V_ADC
3V3_D
9A
DSD_BCK
NET/USB_DSDR NET/USB_DSDR
DSD_DATA_L
NET/USB_LRCK NET/USB_LRCK
IC1402
PCM_BCK
TC74VHC157FK
BD1402
PCM_DATA
R1448
BD121T
100
NET/USB_MCK NET/USB_MCK
SELECT Vcc
R1447
H
ADSP_LRCK
1A ST
TO A9
R1441 1K
1B 4A ADSP_DATA
33
I2S_LRCK 1Y 4B
R1444
ADSP_BCK 2A 4Y I2S_DATA
R1442
33
2B 3A ADSP_MCK
33
I2S_BCK 2Y 3B R1443
GND 3Y I2S_MCLK
33
C1441
100N-K
J
0B
NET_PCM/DSD_SEL
DIR_RST
DIR_CE
DIR_CL
DIR_DI
DIR_DO
K
DIR_RERR
DIR_INT
TO B0
CN1401
3V3_D
DGND
L
OPT2 SPDIF_OPT2
DGND
OPT1
SPDIF_OPT1
DGND
COAX SPDIF_COAX
CN1401
20022WS-07C
TO CN801
M
GND LINE POWER+ LINE POWER- LINE ANALOG AUDIO R
1 2 3
4 5 6
DRA-100 MAIN - DSP/DIR/FPGA (6/9)
R1430 33 R1436 10K
R1425 R1431 33 R1435 10K
100
R1434 10K
R1433 10K
-
88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67
C1436
10N-K
66
C1435
65 10N-K
VDD_INT
CLK_CFG1
C1434
VDD_EXT VDD_INT VDD_INT 64
BOOT_CFG0
10N-K
VDD_INT VDD_THD 63
BOOT_CFG1 THD_P 62
GND
THD_M 61
CLK_CFG0 GND 60
C1433
VDD_INT VDD_INT 59
10N-K
R1437
CLKIN DAI_P11 58
33
XTAL DAI_P12 57 DSD_DATA_L
R1438
VDD_EXT DAI_P15 56
33
VDD_INT DAI_P16 55 ADSP_LRCK
VDD_INT DAI_P17 54 ADSP_BCK
R1439
RESETOUT /RUNRSTIN DAI_P18 53
IC1401 33
VDD_INT DAI_P14 52
ADSP-21477KCPZ-1A
DPI_P01 DAI_P04 51
C1432
DPI_P02 DAI_P08 50 10N-K
R1440
DPI_P03 VDD_INT 49
33
VDD_INT DAI_P20 48
C1431
DPI_P05 VDD_EXT 47 10N-K
C1430
DPI_P04 VDD_INT 46
10N-K
DPI_P06 DAI_P10 45
23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
C1425 C1427 C1426
10000N-K 10N-K 10N-K 10N-K
SPDIF_OPT2
SPDIF_OPT1
SPDIF_COAX
R1475
10K
C1455
12P-J
4 3
1 2
36 35 34 33 32 31 30 29 28 27 26 25
R1452
37 24
680
C1466
38 23
100N-K
39 XTI DVDD 22
40 XTO DGND 21
37 : RXIN0 24 MDI/SDA
R1478 33
41 AGND 38 : GNDRX 23 MDO/ADR0 SCKO 20
R1479 33
42 VCC BCK 19
R1480 33
43 FILT LRCK 18
R1481 33
44 VCOM DOUT 17
47 VINL 13 : MPIO_B2
45 AGNDAD MPO1 16
48 VINR 14 : MPIO_B3
46 VCCAD MPO0 15
47 14
48 13
C1454
1 2 3 4 5 6 7 8 9 10 11 12 IC1451
68N-3216
PCM9211
C1458
10/16-Z8154
AUX_R
AUX_L
ANALOG AUDIO L DIGITAL AUDIO SUBWOOFER
4 5 6
7 8 9 10
R1502 33
FS-STS-A0 FS_STS_A0 A2
R1503 33
A3
FS-STS-A1 FS_STS_A1
R1504 33
A5
FS-STS-B0 FS_STS_B0
R1505 33 1 2
A4
FS-STS-B1 FS_STS_B1
A1 A2
R1506 33
FS-STS-B2 FS_STS_B2 B4
A
3V3_FPGA FS_STS_A0
R1507 33
FPGA_RST RESET B1
B1 B2
R1508 33
FPGA_MUTE MUTE C2
B
R1509 33
D1 RESET GND
VER_CONT VERCONT.
R1510 33
F1
EMPHASIS EMPHASIS.
C1 C2
R1511 33
F2
DIR_INT RERR
C
R1512 33
ASDO MUTE
CLK_SEL2 CLK-SEL2 F3
R1513 10K
USBB_MUTE
PCM/DSD_SEL G1
D1 D2
R1514 33
USBB-MUTE G2
R1515 33 D
VERCONT. NCSO
AMUTE AMUTE_O N6
E1 E2
E
GND GND
F1 F2
IC1502
EPCQ16SI8N
F
EMPHASIS. RERR
nCS Vcc
DATA0 H2
DATA Vcc
G1 G2
R1528 0
Vcc DCLK DCLK H1
R1529 0
G
GND ASDI PCM/DSD_SEL USBB-MUTE
NCSO D2
R1530 0
ASDO C1
H1 H2
H
R1531 10K
DCLK DATA0
NSTATUS F4
R1532 10K
NCONFIG H5
J1 J2
R1533 0
NCE J3
J
I2S-LRCK I2S-BCK
2V5_FPGA
FPC1501
K1 K2
K
I2S-DATA
TCK H3
L1 L2
TDO J4
L
TMS J5
TDI H4
M1 M2
M
SPDIF-MCLK MCLK
N1 N2
R1516 33
M2
ADSP_MCK MCLK
N
R1517 10K
DSD-BCK R1
P1 P2
R1518 10K
DSD-DATA-L P1
R1519 10K P
P2 DSD-DATA-L DSD-DATA-R
DSD-DATA-R
R1 R2
R1520 33
M1
DIR_MCK SPDIF-MCLK
R
R1521 33
DSD-BCK GND
K1
DIR_DATA I2S-DATA
R1522 33
DIR_LRCK I2S-LRCK J1
T1 T2
R1523 33
DIR_BCK I2S-BCK J2
T
3V3_FPGA PCM-DATA
R1524 22
FPGA_DATA PCM-DATA T2
IC1501
R1525 22
R5 EP4CE15F17C8N
FPGA_LRCK PCM-LRCK
R1526 22
T4
FPGA_BCK PCM-BCK
SPDIF_MCK
R1527 33
SPDIF-MCLK-O T7
3V3_FPGA
DIR_RST
DIR_CE
DIR_CL
1V2_FPGA
DIR_DI
DIR_DO
DIR_MCK
DIR_BCK
DIR_LRCK
DIR_DATA
7A
DIR_INT
TO POWER SHEET
TO A7
7 8 9 10
51
11 12 13
3 4 5 6 7 8 9 1 0 1 1 1 2
A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13
FS_STS_A1 FS_STS_B1 FS_STS_B0 GND GND FPGA-R1 FPGA-R2 FPGA-R3
B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13
FS_STS_B2 GND GND
C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13
3V3_FPGA GND 3V3_FPGA 3V3_FPGA GND 3V3_FPGA
D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13
1.2V_PLL3 GND GND 1.2V_PLL2
E3 E4 E5 E6 E7 E8 E9 E10 E11 E12 E13
3V3_FPGA GND DGNDA3 DGNDA2
F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13
CLK-SEL2 NSTATUS 2V5_FPGA GND 1V2_FPGA GND 1V2_FPGA 2V5_FPGA
G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13
3V3_FPGA GND 1V2_FPGA 1V2_FPGA 1V2_FPGA 1V2_FPGA 1V2_FPGA MSEL2
H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13
TCK TDI NCONFIG 1V2_FPGA GND GND GND GND 1V2_FPGA MSEL1
J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13
NCE TDO TMS 1V2_FPGA GND GND GND GND GND
K3 K4 K5 K6 K7 K8 K9 K10 K11 K12 K13
3V3_FPGA GND 1V2_FPGA GND 1V2_FPGA
L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13
2V5_FPGA 2V5_FPGA
M3 M4 M5 M6 M7 M8 M9 M10 M11 M12 M13
3V3_FPGA GND DGNDA1 DGNDA4
N3 N4 N5 N6 N7 N8 N9 N10 N11 N12 N13
1.2V_PLL1 AMUTE_O GND GND 1.2V_PLL4
P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13
3V3_FPGA GND 3V3_FPGA 3V3_FPGA GND 3V3_FPGA
R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13
PCM-LRCK
GND GND
T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13
PCM-BCK SPDIF-MCLK-O GND GND
2V5_FPGA
BD1501 BD121T
N4
1.2V_PLL1
BD1502 BD121T
1.2V_PLL2 D13
BD1503 BD121T
1.2V_PLL3 D4
BD1504 BD121T
1.2V_PLL4 N13
R1537 0
DGNDA1 M5
R1538 0
DGNDA2 E12
R1539 0
DGNDA3 E5
R1540 0
M12
DGNDA4
SCHEMATIC DIAGRAMS (06/10)

SCH06_MAIN DSP DIR FPGA

11 12 13
14 15 16
A
B
1 3 1 4 1 5 1 6 R1560 0
A10
FPGA-R1 FPGA_R1
A14 A15 A16
R1561 0
A11 FPGA-R2 FPGA_R2
R1562 0
3V3_FPGA
A12 FPGA-R3 FPGA_R3
B14 B15 B16
GND TEST13
C14 C15 C16
C
D14 D15 D16
TEST15
E14 E15 E16
GND 3V3_FPGA GND GND
F14 F15 F16
D
TEST14 TEST12 TEST11
G14 G15 G16
GND 3V3_FPGA
H14 H15 H16
MSEL0 CONF_DONE GND GND
R1541 0
G12 MSEL2
J14 J15 J16
R1542 0
H12 MSEL1
R1543 0 E
TEST10
H13 MSEL0
R1544 10K
H14
CONF_DONE
K14 K15 K16
R1545 33
GND 3V3_FPGA TEST9 TEST8
F16
TEST11
R1546 33
F15 TEST12
L14 L15 L16
R1547 33
B16 TEST13
R1548 33
TEST7 TEST6
F14 TEST14
R1549 33
D16 TEST15
M14 M15 M16
R1550 33 F
GND 3V3_FPGA GND GND
L16 TEST6
R1551 33
L15 TEST7
N14 N15 N16
R1552 33
K16 TEST8
R1553 33
TEST1 TEST5
K15 TEST9
R1554 33
J16 TEST10
P14 P15 P16
R1555 33
TEST2 TEST3
N14 TEST1
R1556 33
P15 TEST2
R14 R15 R16
R1557 33
P16 TEST3
R1558 33 G
GND AUX-SEL
R16 AUX-SEL AUX_SEL
R1559 33
TEST5
N16
T14 T15 T16
3V3_FPGA
B5
FPGA_DATA
FPGA_LRCK
H
FPGA_BCK
TO 5B
B6
J
AUX_R
AUX_L
TO 6B
K
L
M
14 15 16