Denon DRA-100 Service Manual page 71

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Pin
Name
69
GPIO_5
70
TEST
71
SPI_CK
72
SPI_CS
73
SPI_DATA
74
P1V8
75
GND
76
P3V3
77
GPIO_6
78
GPIO_7
79
VPD
80
CH_4_5_AUDIO_WS
81
CH_4_5_AUDIO_SD
82
CH_4_5_AUDIO_SCK
83
CH_6_7_AUDIO_WS
84
CH_6_7_AUDIO_SD
85
CH_6_7_AUDIO_SCK
86
P1V8
87
GND
88
P3V3
89
CH7_PWM0
90
CH7_PWM1
91
CH7_PWM2
92
CH6_PWM0
Pin
Name
Production Information
93
CH6_PWM1
© 2012 Cambridge Silicon Radio Limited
This material is subject to CSR's non-disclosure agreement.
94
CH6_PWM2
95
P3V3
96
GND
97
CH5_PWM0
98
CH5_PWM1
99
CH5_PWM2
100
CH4_PWM0
101
CH4_PWM1
102
CH4_PWM2
103
P3V3
104
GND
105
P1V8
106
C7P1V8
107
CH7_REF0
108
C7P3V3
109
C7GND
110
CH7_REF1
111
CH7_REF2
112
CH7_FB0
113
CH7_FB1
114
C67P1V8
Production Information
© 2012 Cambridge Silicon Radio Limited
This material is subject to CSR's non-disclosure agreement.
Function
Description
Bidirectional, pull-down
GPIO
Input, pull-down
Test mode, tie to ground
Input, pull-down
SPI control input clock
Input, pull-down
SPI control input chip select
Bidirectional, pull-down
SPI control data input/output
-
1.8 V core supply
-
Ground
-
3.3 V I/O supply
Bidirectional, pull-down
GPIO
Bidirectional, pull-down
GPIO
-
Test mode, tie to ground
Input, pull-down
Channels 4, 5 audio input word clock
Input, pull-down
Channels 4, 5 audio input data
Input, pull-down
Channels 4, 5 audio input bit clock
Input, pull-down
Channels 6, 7 audio input word clock
Input, pull-down
Channels 6, 7 audio input data
Input, pull-down
Channels 6, 7 audio input bit clock
-
1.8 V core supply
-
Ground
-
3.3 V I/O supply
Output
Channel 7 low side drive
Bidirectional, pull-down
Channel 7 high side drive or channel 6/7
PWM sense control
Output
Channel 7 high side drive
Output
Channel 6 low side drive
Function
Description
Bidirectional, pull-down
Channel 6 high side drive or channel 6/7
PWM sense control
Output
Channel 6 high side drive
-
3.3 V I/O supply
-
Ground
Output
Channel 5 low side drive
Bidirectional, pull-down
Channel 5 high side drive or channel 4/5
PWM sense control
Output
Channel 5 high side drive
Output
Channel 4 low side drive
Bidirectional, pull-down
Channel 4 high side drive or channel 4/5
PWM sense control
Output
Channel 4 high side drive
-
3.3 V I/O supply
-
Ground
-
1.8 V core supply
-
1.8 V core supply (quiet)
Output, tristate
Channel 7 reference 0 output
-
3.3 V I/O supply (quiet)
-
Ground
Output, tristate
Channel 7 reference 1 output
Output, tristate
Channel 7 reference 2 output
Bidirectional, pull-up
Channel 7 low resolution feedback input
or channel 6/7 I²S output word clock
Bidirectional, pull-up
Channel 7 high resolution feedback input
or channel 6/7 I²S output data
-
1.8 V core supply (quiet)
71
Page 18 of 181
CS-225959-DSP6
www.csr.com
Page 19 of 181
CS-225959-DSP6
www.csr.com

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