Texas Instruments AFE79 Series Programming & User Manual page 498

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SERDES Register Map
2.6.100 Register 41FDh (offset = 41FDh) [reset = 22h]
7
6
VCASGA5X
R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
7-5
VCASGA5X
1-0
VGAVDSAT[2:1]
2.6.101 Register 41FEh (offset = 41FEh) [reset = B6h]
7
6
RX_AC_COUP
LE_EN
R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
RX_AC_COUPLE_
7-7
EN
6-4
VGAVDCOM1
3-1
VGAVDCOM2
2.6.102 Register 41FFh (offset = 41FFh) [reset = 80h]
7
6
PU_RX_AGC_
LANE
R/W-1h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
PU_RX_AGC_LAN
7-7
E
4-4
RX_CTLE_BIAS4
3-3
RX_INPUT_EN
498
Serial Interface Register Maps
Figure 2-814. Register 41FDh
5
4
Table 2-820. Register 41FD Field Descriptions
Type
Reset
R/W
1h
R/W
2h
Figure 2-815. Register 41FEh
5
4
VGAVDCOM1
R/W-3h
Table 2-821. Register 41FE Field Descriptions
Type
Reset
R/W
1h
R/W
3h
R/W
3h
Figure 2-816. Register 41FFh
5
4
RX_CTLE_BIA
S4
R/W-0h
Table 2-822. Register 41FF Field Descriptions
Type
Reset
R/W
1h
R/W
0h
R/W
0h
Copyright © 2020, Texas Instruments Incorporated
3
2
Description
3
2
VGAVDCOM2
R/W-3h
Description
Enables RX AC coupling.
0h: DC coupling
1h: AC coupling
3
2
RX_INPUT_EN
R/W-0h
Description
Power up RX AGC by lane.
0h: Power down
1h: Power up
RX CTLE bias setting 4.
Enables RX input.
0h: RX input disabled (Default)
1h: RX input enabled (Required)
www.ti.com
1
0
VGAVDSAT[2:1]
R/W-2h
1
0
1
0
SBAU337 – May 2020
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