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DAC JESD Register Map
Bit
Field
JESD_SHORTTES
7-0
T_INPUT2[7:0]
2.4.149 Register BDh (offset = BDh) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
JESD_SHORTTES
7-0
T_INPUT2[15:8]
2.4.150 Register BEh (offset = BEh) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
JESD_SHORTTES
7-0
T_INPUT3[7:0]
2.4.151 Register BFh (offset = BFh) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
JESD_SHORTTES
7-0
T_INPUT3[15:8]
318
Serial Interface Register Maps
Table 2-381. Register BC Field Descriptions
Type
Reset
R/W
0h
Figure 2-378. Register BDh
5
4
JESD_SHORTTEST_INPUT2[15:8]
R/W-0h
Table 2-382. Register BD Field Descriptions
Type
Reset
R/W
0h
Figure 2-379. Register BEh
5
4
JESD_SHORTTEST_INPUT3[7:0]
R/W-0h
Table 2-383. Register BE Field Descriptions
Type
Reset
R/W
0h
Figure 2-380. Register BFh
5
4
JESD_SHORTTEST_INPUT3[15:8]
R/W-0h
Table 2-384. Register BF Field Descriptions
Type
Reset
R/W
0h
Copyright © 2020, Texas Instruments Incorporated
Description
short test pattern input
3
2
Description
short test pattern input
3
2
Description
short test pattern input
3
2
Description
short test pattern input
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SBAU337 – May 2020
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