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6.25 TCP2 Status Register (TCPSTAT)
The TCP2 status register (TCPSTAT) is shown in
31
Reserved
23
22
CRC_PASS
SNR_EXCEED
R-0
15
ACTIVE_STATE
7
6
REXT
WAP
R-0
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
Field
31-28
Reserved
27-24
TCP_STATE
23
CRC_PASS
22-21
SNR_EXCEED
20-16
ACTIVE_ITER
15-12
ACTIVE_STATE
11
ACTIVE_MAP
10
EMUHALT
9
ROP
8
RHD
SPRUGK1 – March 2009
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Figure 55. TCP2 Status Register (TCPSTAT)
28
R-0
21
20
R-0
12
R-0
5
4
WSP
WINT
R-0
R-0
Table 30. TCP2 Status Register (TCPSTAT) Field Descriptions
Value
Description
0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
TCP2 top level state of state machine. The states are defined in the TCP2 state machine section.
CRC status
0
CRC has not passed
1
CRC passed
SNR status
0
0 MAP0 failed SNR
0
1 MAP0 passed SNR
1
0 MAP1 failed SNR
1
1 MAP1 passed SNR
Active TCP2 iteration status.
Active state status
Active map status
Note: ACTIVE_MAP bit status is reserved when the FREE bit = 0 and the SOFT bit = 0.
Defines if the TCP2 is halted due to emulation.
0
Not halted due to emulation
1
Halted due to emulation
Note: EMUHALT bit status is reserved when the FREE bit = 0 and the SOFT bit = 1.
Defines if the TCP2 is waiting for output parameter data to be read.
0
Not waiting
1
Waiting for RAM output registers to be read
Defines if the TCP2 is waiting for hard decision data to be read.
0
Not waiting
1
Waiting for RAM output/decision memory to be read
Figure 55
and described in
27
TCP_STATE
ACTIVE_ITER
R-0
11
10
ACTIVE_
EMUHALT
MAP
R-0
R-0
3
2
WIC
ERR
R-0
R-0
TMS320C6457 Turbo-Decoder Coprocessor 2
Registers
Table
30.
24
R-0
16
9
8
ROP
RHD
R-0
R-0
1
0
DEC_BUSY
Reserved
R-0
R-0
47
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