Cpu Module; Performance Specifications - Mitsubishi Electric MELCEC Q Series User Manual

4.

CPU MODULE

4 CPU MODULE
4.1

Performance Specifications

Performance specifications of CPU modules are shown below.
Item
Control method
I/O control mode
Programming language
Processing speed (sequence instruction)
Constant scanning
(Program startup with a specified interval)
*1
Memory capacity
Main sequence
Program capacity
program
(steps)
Sub sequence program
*2
Number of I/O device points
Number of I/O points
Performance specifications
Q02CPU-A
Stored program repeat operation
Language dedicated to sequence control
Relay symbol language, logic symbol language, MELSAP-II (SFC)
79ns/step
Can be set between 10ms and 190ms in 10ms units.
144k bytes of built-in RAM + 144k bytes of built-in ROM
Max. 28k steps
None
8192 points (X/Y0 to X/Y1FFF)
*1 Each memory capacity for the programmable controllers is the sum total of the parameters, T/
C setting values, program capacities, file registers, comment points, sampling traces and
status latches. The memory capacities are unchanged. The extension memories cannot be
approved. For the calculation method of memory capacity, refer to Section 4.2.2.
*2 I/O devices of the actual number of I/O points or later can be used as the MELSECNET/10,
MELSECNET(II)/B, MELSECNET/MINI or CC-Link.
4 - 1
Model
Q02HCPU-A Q06HCPU-A
Refresh mode
34ns/step
Max. 30k steps
Max. 30k steps
4096 points
(X/Y0 to X/YFFF)
Remark
Partial direct I/O are
available by the
instructions.
Set in special register
D9020.
Set in parameters.
The number of points
usable in the program
The number of points
which can be used for
access to actual I/O
modules