External Bus Interface - Motorola DigitalDNA MPC180E User Manual

External Bus Interface

Table 3-1. 32-Bit System Address Map (Continued)
MPC180E 12-Bit Address
0x600
0x602
0x800
0x880
0x900
0x901
0x902
0x903
0x904
0x905
0x906
0xA00
0xA40
0xA80
0xB00
0xB01
0xB02
0xB03
0xB05
0xB06
0xB07
0xB08
0xB09
3.3 External Bus Interface
The EBI handles the interface between the processor and MPC180E's internal execution
units. It has the following features:
• Memory-mapped data transfers to/from the host to the MPC180E in single, burst, or
DMA modes
• 4-Kbit input and output buffers that allows the host to set up an operation and pass
control of interrupts and data flow to the MPC180E until the operation completes
3-4
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Processor 32-Bit Address
RNG: 0x600–0x7FF
0x0000_1800
0x0000_1808
EBI: 0x800–0x9FF
0x0000_2000
0x0000_2200
0x0000_2400
0x0000_2404
0x0000_2408
0x0000_240C
0x0000_2410
0x0000_2414
0x0000_2418
PKEU: 0xA00–0xBFF
0x0000_2800
0x0000_2900
0x0000_2A00
0x0000_2C00
0x0000_2C04
0x0000_2C08
0x0000_2C0C
0x0000_2C14
0x0000_2C18
0x0000_2C1C
0x0000_2C20
0x0000_2C24
MPC180E Security Processor User's Manual
Register
Status
Random output
Input buffer[128]
Output buffer[128]
CSTAT
ID
IMASK
IBCTL
IBCNT
OBCTL
OBCNT
BRAM
ARAM
NRAM
EXP(k)
Control
Status
Interrupt mask
Program counter
Clear interrupt (CLRIRQ)
Modulus size
EXP(k) size
Device ID
Type
R
R
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
W
R/W
R/W
R/W