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FIMV-MFC V1.0
BitCodeReset (0x014)
Bit
0
BitCurPc (0x018)
Bit
13:0
CodeBufAddr (0x100)
Bit
31:0
WorkBufAddr (0x104)
Bit
31:0
ParaBufAddr (0x108)
Bit
31:0
Name
Type
CodeReset
W
If host write '1' to this register, program counter of BIT
is set to "0" Therefore restart at initial routine
Name
Type
CurPc
R
Current program counter of BIT processor.
This register may be used for only debugging
purpose
Name
Type
CodeBufAddr
R/W
BIT firmware code image start byte address which
resides in SDRAM.
Host must set start SDRAM byte address of BIT
code image to this register before start executing BIT
processor
* Current design uses 80 KB for code buffer
Name
Type
WorkBufAddr
R/W
BIT processor working buffer SDRAM byte address.
Host must reserve working buffer in SDRAM for BIT
processor encoding/decoding.
Name
Type
ParaBufAddr
R/W
BIT processor parameter buffer SDRAM byte
address. Host must reserve parameter buffer in
SDRAM for BIT processor command execution
argument and return data.
* Current design uses 8 KB for parameter buffer
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
MULTI-FORMAT
Function
Function
Function
Function
Function
CODEC
VIDEO
Reset Value
0
Reset Value
0
Reset Value
N/A
Reset Value
N/A
Reset Value
N/A
21-61
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