Samsung S3C6400X User Manual page 1121

IRDA
IRDA INTERUPT ENALBLE REGISTER(IRDA_IER)
Register Address
IrDA _IER 0x7F00_700C
IrDA_IER
Last byte to Rx FIFO
Error indication
Tx Underrun
Last byte detect
Rx overrun
Last byte read from Rx
FIFO
Tx FIFO below
threshold
Rx FIFO over threshold
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
38-14
Specifications and information herein are subject to change without notice.
R/W
R/W IrDA Interrupt Enable Register
Bit
[7] Enables state indication interrupt. When Last byte write to
[6] Enables error status indication interrupt in data receiving
[5] Enables transmitter under-run interrupt.
[4] Detect stop-flag interrupt enable. If this bit is set to "1", an
interrupt signal will be activated when the last byte of the
received data frame comes into the demodulation block
and then CRC decoding is finished.
[3] Enables receiver over-run interrupt.
[2] Bit 2 enables last byte from RX FIFO interrupt which is
generated when the microcontroller reads the last byte of
[1] Bit 1 enables an TX FIFO below threshold level interrupt
when the available empty space in TX FIFO is over the
[0] Bit 0 enables received data in RX FIFO over threshold
level interrupt when the RX FIFO is equal to or above the
S3C6400X RISC MICROPROCESSOR
Description
Description
RX FIFO.
mode.
the frame from the RX FIFO.
threshold level.
threshold level.
Reset Value
0x00
Initial State
0
0
0
0
0
0
0
0