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PCM AUDIO INTERFACE
The PCM Tx FIFO REGISTER
Register
PCM_TXFIFO
0x7F009008
0x7F00A008
The bit definitions for the PCM_TXFIFO Register are described below:
PCM_TXFIFO
Reserved
TXFIFO_DVALID
TXFIFO_DATA
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
37-10
Specifications and information herein are subject to change without notice.
Address
R/W
R/W
Bit
[31:17]
Reserved
[16]
TXFIFO data is valid
Write: Not Valid
Read: TXFIFO read data valid
1: valid
0: invalid (probably read an empty fifo)
[15:0]
TXFIFO DATA
Write: TXFIFO_DATA is written into the TXFIFO
Read: TXFIFO is read using the APB interface
NOTE: reading the TXFIFO is meant to support debugging.
Online the TXFIFO is read by the PCM serial shift engine, not
the APB
Description
Control the PCM Audio Inteface
Description
S3C6400X RISC MICROPROCESSOR
Reset Value
0x00000000
Initial
State
0
0
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